SLVSCV3B March   2015  – June 2015 TPS566250

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Simplified Schematic
  5. 5 Revision History
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 PWM Operation
      2. 8.3.2 PWM Frequency and Adaptive On-Time Control
      3. 8.3.3 Soft Start and Pre-Biased Soft Start
      4. 8.3.4 Overcurrent Protection
      5. 8.3.5 UVLO Protection
      6. 8.3.6 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Auto-Skip Eco-mode™ Control
    5. 8.5 Programming
      1. 8.5.1 I2C Interface
      2. 8.5.2 I2C Protocol
        1. 8.5.2.1 Input Voltage
        2. 8.5.2.2 Output Voltage
        3. 8.5.2.3 Data Format
        4. 8.5.2.4 START and STOP Conditions
      3. 8.5.3 I2C Chip Address Byte
    6. 8.6 Register Maps
      1. 8.6.1 I2C Register Address Byte
        1. 8.6.1.1 Output Voltage Register (offset = 00000000) [reset = 0h]
        2. 8.6.1.2 Power Good State Register (offset = 00011000) [reset = 18h]
      2. 8.6.2 CheckSum Bit
      3. 8.6.3 Output Voltage Registers
      4. 8.6.4 Summary of Default Control Bits
        1. 8.6.4.1 DAC Settle
        2. 8.6.4.2 Operation During VID Transition
  9. 9 Applications and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Output Voltage Resistors Selection
        2. 9.2.2.2 Output Filter Selection
        3. 9.2.2.3 Input Capacitor Selection
        4. 9.2.2.4 Bootstrap Capacitor Selection
      3. 9.2.3 Application Performance Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
    2. 12.2 Third-Party Products Disclaimer
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information
    1. 13.1 Thermal Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7 Specifications

7.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted) (1)(2)
MIN MAX UNIT
Input voltage range VIN, EN –0.3 19 V
BOOT –0.3 25
BOOT (10ns transient) –0.3 27
BOOT (vs SW) –0.3 6.5
FB, SDA, SCL –0.3 3.6
SW –2 19
SW (10ns transient) –3.5 21
Operating Junction temperature, TJ –40 150 °C
Storage temperature, TSTG –55 150 °C
(1) These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions.
(2) All voltages are with respect to IC GND terminal.

7.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±500
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

7.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
VIN Supply input voltage range 4.5 17 V
Input voltage range BOOT –0.1 23
BOOT (10 ns transient) –0.1 26
BOOT (vs SW) –0.1 6
EN –0.1 17
FB, SDA, SCL –0.1 3.3
SW –1.8 17
SW (10 ns transient) –3.5 20
TJ Operating junction temperature range –40 150 °C

7.4 Thermal Information

THERMAL METRIC(1) TPS566250 UNIT
DDA (8)
RθJA Junction-to-ambient thermal resistance 42.1 °C/W
RθJCtop Junction-to-case (top) thermal resistance 55.7
RθJB Junction-to-board thermal resistance 24.9
ψJT Junction-to-top characterization parameter 9.5
ψJB Junction-to-board characterization parameter 24.9
RθJCbot Junction-to-case (bottom) thermal resistance 3.5
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

7.5 Electrical Characteristics

Over operating junction temperature range, VIN = 12 V (Unless otherwise noted)
PARAMETER CONDITIONS MIN TYP MAX UNIT
SUPPLY VOLTAGE
IIN VIN supply current TA = 25°C, EN = 5 V, FB = 0.7 V (non switching) 450 525 µA
I(VINSDN) VIN shutdown current TA = 25°C, EN = 0 V 6.5 10 µA
LOGIC THRESHOLD
V(ENH) EN H-level threshold voltage 1.1 1.6 V
V(ENL) EN L-level threshold voltage 0.6 0.94 V
Hystersis 160 mV
R(EN) EN pin resistance to GND V(EN) = 12 V 225 350 800 kΩ
FEEDBACK VOLTAGE
V(FB) FB voltage TA = 0°C to 85°C
VOUT = 1.1 V, Upper/lower feedback resistors:
1.37 kΩ / 1.65 kΩ 		–1.6% 0 1.6%
TA = 25°C, VOUT = 1.1 V, IOUT = 10 mA, pulse skipping 0.606 V
TA = 25°C, VOUT = 1.1 V, continuous current mode 0.594 0.6 0.606 V
MOSFET
rDS(on)H High side switch resistance BOOT - SW = 5.5 V 44 74 mΩ
rDS(on)L Low side switch resistance VIN = 12 V 23 35 mΩ
Discharge FET 200 Ω
ON-TIME TIMER CONTROL
fsw Switching frequency LOUT = 1.5 µH, COUT = 22 µF x 2, VOUT = 1.1 V 650 kHz
CURRENT LIMIT
IOCL Valley current limit LOUT = 1.5 µH, VOUT = 1.1 V, VIN = 12 V 7.6 9.5 11.4 A
Reverse valley current limit LOUT = 1.5 µH, VOUT = 1.1 V 1.5 4.5 7 A
OUTPUT UNDERVOLTAGE PROTECTION
V(UVP) Output UVP trip threshold UVP detect (H > L) 65%
THERMAL SHUTDOWN
TSDN Thermal shutdown Threshold Shutdown temperature(1) 165 °C
Hysteresis(1) 15 °C
UVLO
UVLO UVLO Threshold VIN rising voltage 3.26 3.75 4.05 V
Hysteresis VIN voltage 0.13 0.33 0.48 V
PGOOD VIA I2C
V(PGOODTH) PGOOD threshold FB falling (fault) VO = 1.1 V 80%
FB rising (good) VO = 1.1 V 85%
FB rising (fault) VO = 1.1 V 125%
FB falling (good) VO = 1.1 V 120%
SERIAL INTERFACE(1)(2)(3)
VIL LOW level input voltage 0.6 V
VIH HIGH level input voltage 1.85 V
Vhys Hysteresis of schmitt trigger inputs 0.11 V
VOL LOW level output voltage
(Open drain, 3 mA sink current)		 0.4 V
fSCL SCL clock frequency 400 kHz
Cb Capacitive load for each bus line 400 pF
(1) Specified by design. Not production tested.
(2) Refer to Figure 1 for I2C Timing Definitions
(3) Cb = capacitance of bus line in pF

7.6 Timing Requirements

MIN TYP MAX UNIT
ON-TIME TIMER CONTROL
ton SW On time VIN = 12 V, VOUT = 1.1 V 165   ns
toff SW Minimum off time TA = 25 °C, FB = 0.5 V 275  325 ns
SOFT START
tSS Soft start time Internal soft start time 0.7 1 1.3 ms
OUTPUT UNDERVOLTAGE PROTECTION
t(UVPDEL) Hiccup delay time (power into short) 1.3 ms
t(UVPEN) Hiccup off time before restart 10 ms
SERIAL INTERFACE(1)(2)(3)
t(SP) Pulse width of spikes suppressed by input filter 32 ns
t(HD;STA) Hold time (repeated) START condition. 0.6 µs
tLOW LOW period of SCL clock 1.3 µs
tHIGH HIGH period of SCL clock 0.6 µs
t(SU;STA) Set-up time for a repeated START condition 0.6 µs
t(HD;DAT) Data Hold time 50 900 ns
t(SU;DAT) Data set-up time 100 ns
tr Rise time (SDA or SCL) 20+0.1Cb(3) 300 ns
tf Fall time (SDA or SCL) 20+0.1Cb(3) 300 ns
t(SU;STO) Set-up time for STOP condition 0.6 µs
t(BUF) Bus free time between STOP and START condition 1.3 µs
(1) Specified by design. Not production tested.
(2) Refer to Figure 1 below for I2C Timing Definitions
(3) Cb = capacitance of bus line in pF
TPS566250 I2C_timing_SLVSCB6.gifFigure 1. I2C Timing Definitions (reproduced from Phillips I2C spec Version 1.1)

7.7 Typical Characteristics

VIN = 12 V, TA = 25 °C, unless otherwise specified.
TPS566250 D010_SLVSCV3.gif
Figure 2. Enable Current vs Enable Voltage
TPS566250 D006_SLVSCV3.gif
Figure 4. Shutdown Current vs Junction Temperature
TPS566250 D008_SLVSCV3.gif
Figure 6. Switching Frequency vs Output Current
TPS566250 D001_SLVSCV3.gif
Figure 8. Soft Start Time vs Junction Temperature
TPS566250 D002_SLVSCV3.gif
Figure 10. Input Voltage UVLO vs Junction Temperature
TPS566250 D014_SLVSCV3.gif
Figure 12. Current Limit vs Input Voltage
TPS566250 D007_SLVSCV3.gif
Figure 3. Supply Current vs Junction Temperature
TPS566250 D009_SLVSCV3.gif
Figure 5. Switching Frequency vs Input Voltage
TPS566250 D005_SLVSCV3.gif
Figure 7. Feedback Voltage vs Junction Temperature
TPS566250 D003_SLVSCV3.gif
Figure 9. HS and LS rDS(on) vs Junction Temperature
TPS566250 D004_SLVSCV3.gif
Figure 11. Current Limit vs Junction Temperature