JAJSPC6 November   2023 TPS61377

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 VCC Power Supply
      2. 7.3.2 Enable and Programmable UVLO
      3. 7.3.3 Soft Start
      4. 7.3.4 Switching Frequency
      5. 7.3.5 Programmable Inductor Peak Current Limit
      6. 7.3.6 Shut Down
      7. 7.3.7 Overvoltage Protection
      8. 7.3.8 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operation
      2. 7.4.2 Forced PWM Mode
      3. 7.4.3 Auto PFM Mode
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Setting Output Voltage
        2. 8.2.2.2 Inductor Selection
        3. 8.2.2.3 Bootstrap Capacitor Selection
        4. 8.2.2.4 Input Capacitor Selection
        5. 8.2.2.5 Output Capacitor Selection
        6. 8.2.2.6 Loop Stability
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
        1. 8.4.2.1 Thermal Considerations
  10. Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 サード・パーティ製品に関する免責事項
    2. 9.2 ドキュメントの更新通知を受け取る方法
    3. 9.3 サポート・リソース
    4. 9.4 Trademarks
    5. 9.5 静電気放電に関する注意事項
    6. 9.6 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Pin Configuration and Functions

GUID-20230518-SS0I-74KK-G0S8-GTWMSR6FWVF2-low.svg Figure 5-1 13-Pin RYH VQFN Package (Top View)
Table 5-1 Pin Functions
PINI/ODESCRIPTION
NAMENUMBER
VIN1IIC power supply input
EN/UVLO2IEnable logic input and programmable input voltage undervoltage lockout (UVLO) input. Logic high level enables the device. Logic low level disables the device and turns it into shutdown mode. The converter start-up and shutdown levels can be programmed by connecting this pin to the supply voltage through a resistor divider.

This pin must not be left floating and must be terminated.

MODE3IOperating mode selection pin for the device in light load condition. When this pin is logic low, the device operates in auto PFM mode. When this pin is logic high, the device operates in forced PWM mode.
VSENSE4IOutput voltage sense
VOUT5PWRBoost converter output
SW6PWRThe switching node pin of the converter. It is connected to the drain of the internal low-side power MOSFET and the source of the internal high-side power MOSFET.
PGND7PWRPower ground of the IC
FB8IOutput voltage feedback pin. Connect to the center tap of a resistor divider to program the output voltage.
COMP9OOutput of the internal error amplifier. Connect the loop compensation network between this pin and the AGND pin.
ILIM10IProgrammable switch peak current limit. An external resistor must be connected between this pin and the AGND pin.
VCC11OOutput of the internal regulator. A ceramic capacitor of more than 1 μF is required between this pin and AGND.
AGND12PWRAnalog ground of the IC
BOOT13OPower supply for high side MOSFET gate driver. A ceramic capacitor of 0.47 μF to 1 μF must be connected between this pin and the SW pin.