JAJSHV0B August   2019  – December  2019 TPS66120 , TPS66121

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     機能表
      1.      TPS6612x ブロック図
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Recommended Supply Load Capacitance
    5. 6.5  Thermal Information
    6. 6.6  PPHV Power Switch Characteristics
    7. 6.7  Power Path Supervisory
    8. 6.8  VBUS LDO Characteristics
    9. 6.9  Thermal Shutdown Characteristics
    10. 6.10 Input-output (I/O) Characteristics
    11. 6.11 Power Consumption Characteristics
    12. 6.12 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 20-V Sink (PPHV Power Path)
        1. 7.3.1.1 PPHV Soft Start
        2. 7.3.1.2 PPHV Reverse Current Protection (RCP)
      2. 7.3.2 Overtemperature Protection
      3. 7.3.3 VBUS Overvoltage Protection (OVP)
      4. 7.3.4 Power Management and Supervisory
        1. 7.3.4.1 Supply Connections
        2. 7.3.4.2 Power Up Sequences
          1. 7.3.4.2.1 Normal Power Up
          2. 7.3.4.2.2 Dead Battery Operation
    4. 7.4 Device Functional Modes
      1. 7.4.1 State Transitions
        1. 7.4.1.1 DISABLED State
        2. 7.4.1.2 SNK State
      2. 7.4.2 SNK FAULT State
      3. 7.4.3 Device Functional Mode Summary
      4. 7.4.4 Enabling the PPHV Sink Path
      5. 7.4.5 Faults
        1. 7.4.5.1 Fault Types
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 External VLDO Capacitor (CVLDO)
        2. 8.2.2.2 PPHV, VBUS Power Path Capacitance
        3. 8.2.2.3 VBUS TVS Protection (Optional)
        4. 8.2.2.4 VBUS Schottky Diode Protection (Optional)
        5. 8.2.2.5 VBUS Overvoltage Protection (Optional)
        6. 8.2.2.6 Dead Battery Support
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 関連リンク
    2. 11.2 ドキュメントの更新通知を受け取る方法
    3. 11.3 サポート・リソース
    4. 11.4 商標
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ

6.5 Thermal Information

THERMAL METRIC(1) TPS6612x UNIT
YBG (WCSP)
28 PINS
RθJA,EFF Effective Junction-to-ambient thermal resistance(2) 44.3 °C/W
RθJA Junction-to-ambient thermal resistance 62.7 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 0.4 °C/W
RθJB Junction-to-board thermal resistance 13.8 °C/W
ψJT Junction-to-top characterization parameter 0.2 °C/W
ψJB Junction-to-board characterization parameter 13.7 °C/W
ψJB,EFF Effective Junction-to-board characterization parameter(2) 14.5 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.
(2) Models based on typical application layout.