JAJSHV0B August   2019  – December  2019 TPS66120 , TPS66121

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     機能表
      1.      TPS6612x ブロック図
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Recommended Supply Load Capacitance
    5. 6.5  Thermal Information
    6. 6.6  PPHV Power Switch Characteristics
    7. 6.7  Power Path Supervisory
    8. 6.8  VBUS LDO Characteristics
    9. 6.9  Thermal Shutdown Characteristics
    10. 6.10 Input-output (I/O) Characteristics
    11. 6.11 Power Consumption Characteristics
    12. 6.12 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 20-V Sink (PPHV Power Path)
        1. 7.3.1.1 PPHV Soft Start
        2. 7.3.1.2 PPHV Reverse Current Protection (RCP)
      2. 7.3.2 Overtemperature Protection
      3. 7.3.3 VBUS Overvoltage Protection (OVP)
      4. 7.3.4 Power Management and Supervisory
        1. 7.3.4.1 Supply Connections
        2. 7.3.4.2 Power Up Sequences
          1. 7.3.4.2.1 Normal Power Up
          2. 7.3.4.2.2 Dead Battery Operation
    4. 7.4 Device Functional Modes
      1. 7.4.1 State Transitions
        1. 7.4.1.1 DISABLED State
        2. 7.4.1.2 SNK State
      2. 7.4.2 SNK FAULT State
      3. 7.4.3 Device Functional Mode Summary
      4. 7.4.4 Enabling the PPHV Sink Path
      5. 7.4.5 Faults
        1. 7.4.5.1 Fault Types
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 External VLDO Capacitor (CVLDO)
        2. 8.2.2.2 PPHV, VBUS Power Path Capacitance
        3. 8.2.2.3 VBUS TVS Protection (Optional)
        4. 8.2.2.4 VBUS Schottky Diode Protection (Optional)
        5. 8.2.2.5 VBUS Overvoltage Protection (Optional)
        6. 8.2.2.6 Dead Battery Support
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 関連リンク
    2. 11.2 ドキュメントの更新通知を受け取る方法
    3. 11.3 サポート・リソース
    4. 11.4 商標
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ

7.3.3 VBUS Overvoltage Protection (OVP)

TPS6612x supports overvoltage protection on the VBUS terminal. When the voltage detected on OVP exceeds a set level, the PPHV power path will automatically be disabled (if enabled), and will remain disabled until the OVP event is removed. FLT is asserted when an overvoltage event occurs. The VBUS OVP threshold may be set using a resistor divider from VBUS to GND, whose divider output is connected to the OVP terminal as shown in Figure 5. Table 1 shows resistor divider settings for common USB Power Delivery fixed voltage supply contracts along with the resulting nominal OVP thresholds. These thresholds may be adjusted based on desired margins for a given application. If VBUS OVP is not required or needs to be disabled, the OVP terminal may be tied or driven to GND as shown in Figure 6. Lastly, as one example implementation, the OVP threshold may be controlled dynamically using outputs from a PD controller or microcontroller as shown in Figure 7. By selecting each output, different VBUS OVP threshold settings are possible.

TPS66120 TPS66121 fig_vbus_ovp_external.gifFigure 5. VBUS OVP Threshold Set by External Resistor Divider

Table 1. Typical External Resistor Divider Settings

PD Fixed Contract R1, kΩ R2, kΩ Nominal VBUS OVP Threshold, V
5 V 102 20 6.1
9 V 182 20 10.1
15 V 309 20 16.5
20 V 432 20 22.6
TPS66120 TPS66121 fig_vbus_ovp_disable.gifFigure 6. VBUS OVP Disabled
TPS66120 TPS66121 fig_vbus_ovp_external_multi.gifFigure 7. Selectable VBUS OVP Thresholds