JAJSGW8B October   2014  – February 2019 TPS735-Q1

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      代表的なアプリケーション
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Internal Current-Limit
      2. 7.3.2 Shutdown
      3. 7.3.3 Dropout Voltage
      4. 7.3.4 Startup and Noise Reduction Capacitor
      5. 7.3.5 Transient Response
      6. 7.3.6 Undervoltage Lockout (UVLO)
      7. 7.3.7 Minimum Load
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 Dropout Operation
      3. 7.4.3 Disabled
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Input and Output Capacitor Requirements
        2. 8.2.1.2 Feedback Capacitor Requirements (TPS73501-Q1 only)
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Output Noise
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Board Layout Recommendations to Improve PSRR and Noise Performance
      2. 10.1.2 Thermal Protection
      3. 10.1.3 Package Mounting
      4. 10.1.4 Power Dissipation
      5. 10.1.5 Estimating Junction Temperature
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 デバイス・サポート
      1. 11.1.1 デバイスの項目表記
    2. 11.2 ドキュメントのサポート
      1. 11.2.1 関連資料
    3. 11.3 ドキュメントの更新通知を受け取る方法
    4. 11.4 コミュニティ・リソース
    5. 11.5 商標
    6. 11.6 静電気放電に関する注意事項
    7. 11.7 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • DRB|8
サーマルパッド・メカニカル・データ
発注情報

6.5 Electrical Characteristics

Over operating temperature range (–40°C ≤ TJ, TA ≤ 125°C), VIN = VOUTnom + 0.5 V or 2.7 V (whichever is greater), IOUT = 1 mA, VEN = VIN, COUT = 2.2 μF, and CNR = 0.01 μF, unless otherwise noted.
For the adjustable version (TPS73501-Q1), VOUT = 3 V. Typical values are at TA = 25°C.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VIN Input voltage(1) 2.7 6.5 V
VFB Internal reference (TPS73501-Q1) TJ = 25°C 1.196 1.208 1.220 V
VOUT Output voltage range
(TPS73501-Q1)		 VFB 6 V
DC output accuracy(1) 1 mA ≤ IOUT ≤ 500 mA,
VOUT + 0.5 V ≤ VIN < 6.5 V		 VOUT > 2.2 V –2% ±1% 2%
VOUT ≤ 2.2 V –3% ±1% 3%
ΔVOUT(ΔVIN) Line regulation(1) VOUTnom + 0.5 V ≤ VIN ≤ 6.5 V 0.02 %/V
ΔVOUT(ΔIOUT) Load regulation 500 µA ≤ IOUT ≤ 500 mA 0.005 %/mA
VDO Dropout voltage(2)
(VIN = VOUTnom – 0.1 V)		 IOUT = 500 mA 280 500 mV
ILIM Output current limit VOUT = 0.9 × VOUTnom, VIN = VOUTnom + 0.9 V,
VIN ≥ 2.7 V		 800 1170 1900 mA
IGND Ground pin current 10 mA ≤ IOUT ≤ 500 mA 45 65 μA
ISHDN Shutdown current VEN ≤ 0 V 0.15 1 μA
IFB Feedback pin current
(TPS73501-Q1)		 VOUTnom = 1.2 V –0.5 0.5 μA
PSRR Power-supply rejection ratio VIN = 3.85 V, VOUT = 2.85 V, CNR = 0.01 µF,
IOUT = 100 mA		 f = 100 Hz 60 dB
f = 1k Hz 68 dB
f = 10 kHz 41 dB
f = 100 kHz 21 dB
Vn Output noise voltage BW = 10 Hz to
100 kHz, VOUT = 2.8 V		 CNR = 0.01 μF 11 × VOUT μVRMS
CNR = none 95 × VOUT μVRMS
tSTR Startup time CNR = none 45 μs
CNR = 0.001 μF 45 μs
CNR = 0.01 μF 50 μs
CNR = 0.047 μF 50 μs
VEN(HI) Enable high (enabled) 1.2 V
VEN(LO) Enable low (shutdown) 0.4 V
IEN(HI) Enable pin current, enabled VEN = VIN = 6.5 V 0.03 1 μA
Tsd Thermal shutdown temperature Shutdown, temperature increasing 165 °C
Reset, temperature decreasing 145 °C
UVLO Undervoltage lockout VIN rising 1.9 2.2 2.65 V
Vhys Hysteresis VIN falling 70 mV
(1) Minimum VIN = VOUT + VDO or 2.7 V, whichever is greater.
(2) VDO is not measured for this family of devices with VOUTnom < 2.8 V because the minimum VIN = 2.7 V.