JAJSFO6F December 2015 – April 2019 TPS99000-Q1
PRODUCTION DATA.
Discontinuous mode is used to achieve lower dimming levels. It replaces the constant block of light during a bit slice with a series of light pulses of controlled amplitude, as illustrated in Figure 20. The number of pulses is controlled by the DLPC230-Q1 software.
Figure 20 is an example diagram showing the Discontinuous Mode signals generating 8 pulses which are equivalent in brightness.
In discontinuous mode, the controller produces discrete pulses of light with fixed off times between pulses. The amount of light that these pulses produce can be precisely controlled to reach low dimming levels. Two control loops are used to create uniform light pulses:
Discontinuous mode consists of a series of triangular pulses of light. The DLPC230-Q1 is in charge of requesting and counting the total number of pulses. A bit slice begins with the low resistance shunt enable (S_EN1) on, and with an RGB color selected. Then DLPC230-Q1 asserts D_EN. This causes the TPS99000-Q1 to turn on the LED current drive (DRV_EN) and the system charges the inductor into the low resistance shunt until the peak current limit (as programmed with ILIM DAC) is reached. Then after a programmable amount of time the DLPC230-Q1 drives S_EN low, forcing inductor current to flow through the selected LED.
The TPS99000-Q1 detects the falling edge of S_EN from the DLPC230-Q1 and issues an on/off/on toggle of the DRV_EN signal. This allows current to flow through the inductor and increases the voltage at the LED anode. When the LED forward voltage is achieved, it begins to emit light. Once the photo feedback loop (TIA, photo feedback comparator, photo feedback DAC) senses the desired light threshold has been crossed, the S_EN1 signal is re-asserted high, and the light pulse is terminated.
The COMPOUT signal going low indicates to the DLPC230-Q1 that the pulse has been completed. The DLPC230-Q1 immediately sets S_EN output high (which sets TPS99000-Q1 output S_EN1 high), then waits for a programmable length of time. After that period of time, the DLPC230-Q1 will decide either to drive D_EN low and wait for the next bit slice or issue a request for a new pulse by placing the S_EN output low. When S_EN output is placed low, the TPS99000-Q1 places S_EN1 low (forcing current through LED) and toggles DRV_EN to request a new peak limit current pulse cycle. This process repeats until the correct number of pulses for the given bit slice have been completed.
In very low brightness operation, the TPS99000-Q1 SYNC (LM3409 COFF) timer is disabled. As a result, DRV_EN is only toggled at the beginning of each light pulse. This synchronizes the inductor and LED current. This synchronization keeps LED pulse heights very consistent from one video frame to the next, preventing flicker.