JAJSGX4 February 2019 TUSB8044A
ADVANCE INFORMATION for pre-production products; subject to change without notice.
| MIN | NOM | MAX | UNIT | ||
|---|---|---|---|---|---|
| Power-on timings. Refer to Figure 1 | |||||
| td1 | VDD stable before VDD33 stable. (2) (3) | 0 | ms | ||
| td2 | VDD and VDD33 before de-assertion of GRSTz. | 3 | ms | ||
| tsu_io | Setup for MISC inputs. (1) | 0.1 | µs | ||
| thd_io | Hold for MISC inputs. (1) | 0.1 | µs | ||
| tVDD33_RAMP | VDD33 supply ramp requirement. | 0.2 | 100 | ms | |
| tVDD_RAMP | VDD supply ramp requirement. | 0.2 | 100 | ms | |
Figure 1. Power-Up Timing Requirements