JAJSC71E May   2016  – May 2019 TUSB1002

PRODUCTION DATA.  

  1. 特長
  2. アプリケーション
  3. 概要
    1.     Device Images
      1.      概略回路図
  4. 改訂履歴
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics, Power Supply
    6. 6.6  Electrical Characteristics
    7. 6.7  Power-Up Requirements
    8. 6.8  Timing Requirements
    9. 6.9  Switching Characteristics
    10. 6.10 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 4-Level Control Inputs
      2. 7.3.2 Linear Equalization
      3. 7.3.3 Adjustable VOD Linear Range and DC Gain
      4. 7.3.4 Receiver Detect Control
      5. 7.3.5 USB3.1 Dual Channel Operation (MODE = “F”)
      6. 7.3.6 USB3.1 Single Channel Operation (MODE = “1”)
      7. 7.3.7 PCIe/SATA/SATA Express Redriver Operation (MODE = “R”; CFG1 = "0"; CFG2 = "0" )
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode
      2. 7.4.2 Disconnect Mode
    5. 7.5 U0 Mode
    6. 7.6 U1 Mode
    7. 7.7 U2/U3 Mode
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical USB3.1 Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Typical SATA, PCIe and SATA Express Application
      1. 8.3.1 Design Requirements
      2. 8.3.2 Detailed Design Procedure
      3. 8.3.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 コミュニティ・リソース
    2. 11.2 商標
    3. 11.3 静電気放電に関する注意事項
    4. 11.4 Glossary
  12. 12メカニカル、パッケージ、および注文情報

Electrical Characteristics, Power Supply

over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
P(U0_SSP_1200mV) TUSB1002 power under normal operation in U0 operating a SuperSpeedPlus datarate with linear range set to 1200mV. At 10 Gbps; VCC supply stable; VCC = 3.3 V; VOD = 1200 mVpp; Pattern = CP9 340 mW
P(U0_SSP_1000mV) TUSB1002 power under normal operation in U0 operating a SuperSpeedPlus datarate with linear range set to 1000mV. At 10 Gbps; VCC supply stable; VCC = 3.3 V; VOD = 1000 mVpp; Pattern = CP9 325 mW
P(U0_SSP_900mV) TUSB1002 power under normal operation in U0 operating a SuperSpeedPlus datarate with linear range set to 900mV. At 10 Gbps; VCC supply stable; VCC = 3.3 V; VOD = 900 mVpp; Pattern = CP9 298 mW
P(U0_SS_1200mV) TUSB1002 power under normal operation in U0 operating a SuperSpeed datarate. At 5 Gbps; VCC supply stable; VCC = 3.3 V; VOD = 1200 mVpp; Pattern = CP0. 340 mW
P(U1) TUSB1002 power when U1. In U1; VCC supply stable; VCC = 3.3 V; VOD = 1200 mVpp 340 mW
P(U2U3) TUSB1002 power when in U2/U3. Both channels 1 and 2 in U2/U3; VCC supply stable; VCC = 3.3 V; 8 mW
P(U2U3_SLP) TUSB1002 power when in U2/U3 and SLP_S0# is low. Both channels 1 and 2 in U2/U3; VCC supply stable; VCC = 3.3 V; 0.850 mW
P(DISCONNECT_NONE) TUSB1002 power when no USB device detected on both TX1P/N or TX2P/N. RX1 and RX2 termination disabled; VCC supply stable; VCC = 3.3 V 2 mW
P(DISCONNECT_ONE) TUSB1002 power when a USB device detected on either TX1P/N or TX2P/N but not both. Either RX1 or RX2 termination enabled both not both enabled; VCC supply stable; VCC = 3.3 V 5 mW
P(DISCONNECT_SLP) TUSB1002 power when no USB device detected on either TX1P/N or TX2P/N and SLP_S0# is low.. RX1 and RX2 termination disabled; VCC supply stable; VCC = 3.3 V 0.850 mW
P(SHUTDOWN) TUSB1002 power when EN is asserted low.; VCC supply stable; VCC = 3.3 V, EN = 0 0.6 mW