JAJSEL3D November 2014 – February 2018 AMC7836
PRODUCTION DATA.
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
CLREN-D15 | CLREN-D14 | CLREN-D13 | CLREN-D12 | CLREN-C11 | CLREN-C10 | CLREN-C9 | CLREN-C8 |
R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
7 | CLREN-D15 | R/W | 0 |
This register determines which DACs go into clear state when a clear event is detected as configured in the DAC-CLEAR-SOURCE registers.
If CLRENn = 1, DAC_n is forced into a clear state with a clear event. If CLRENn = 0, a clear event does not affect the state of DAC_n. |
6 | CLREN-D14 | R/W | 0 | |
5 | CLREN-D13 | R/W | 0 | |
4 | CLREN-D12 | R/W | 0 | |
3 | CLREN-C11 | R/W | 0 | |
2 | CLREN-C10 | R/W | 0 | |
1 | CLREN-C9 | R/W | 0 | |
0 | CLREN-C8 | R/W | 0 |