JAJSJY1B September   2020  – March 2022 ADC3660

PRODUCTION DATA  

  1. 特長
  2. アプリケーション
  3. 概要
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics - Power Consumption
    6. 6.6 Electrical Characteristics - DC Specifications
    7. 6.7 Electrical Characteristics - AC Specifications
    8. 6.8 Timing Requirements
    9. 6.9 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Analog Input
        1. 8.3.1.1 Analog Input Bandwidth
        2. 8.3.1.2 Analog Front End Design
          1. 8.3.1.2.1 Sampling Glitch Filter Design
          2. 8.3.1.2.2 Analog Input Termination and DC Bias
            1. 8.3.1.2.2.1 AC-Coupling
            2. 8.3.1.2.2.2 DC-Coupling
        3. 8.3.1.3 Auto-Zero Feature
      2. 8.3.2 Clock Input
        1. 8.3.2.1 Single Ended vs Differential Clock Input
        2. 8.3.2.2 Signal Acquisition Time Adjust
      3. 8.3.3 Voltage Reference
        1. 8.3.3.1 Internal voltage reference
        2. 8.3.3.2 External voltage reference (VREF)
        3. 8.3.3.3 External voltage reference with internal buffer (REFBUF)
      4. 8.3.4 Digital Down Converter
        1. 8.3.4.1 DDC MUX
        2. 8.3.4.2 Digital Filter Operation
          1. 8.3.4.2.1 FS/4 Mixing with Real Output
        3. 8.3.4.3 Numerically Controlled Oscillator (NCO) and Digital Mixer
        4. 8.3.4.4 Decimation Filter
        5. 8.3.4.5 SYNC
        6. 8.3.4.6 Output Formatting with Decimation
      5. 8.3.5 Digital Interface
        1. 8.3.5.1 SDR Output Clocking
        2. 8.3.5.2 Output Data Format
        3. 8.3.5.3 Output Formatter
        4. 8.3.5.4 Output Bit Mapper
        5. 8.3.5.5 Output Interface/Mode Configuration
          1. 8.3.5.5.1 Configuration Example
      6. 8.3.6 Test Pattern
    4. 8.4 Device Functional Modes
      1. 8.4.1 Normal Operation
      2. 8.4.2 Power Down Options
      3. 8.4.3 Digital Channel Averaging
    5. 8.5 Programming
      1. 8.5.1 Configuration using PINs only
      2. 8.5.2 Configuration using the SPI interface
        1. 8.5.2.1 Register Write
        2. 8.5.2.2 Register Read
    6. 8.6 Register Maps
      1. 8.6.1 Detailed Register Description
  9. Application and Implementation
    1. 9.1 Typical Application
      1. 9.1.1 Design Requirements
      2. 9.1.2 Detailed Design Procedure
        1. 9.1.2.1 Input Signal Path
        2. 9.1.2.2 Sampling Clock
        3. 9.1.2.3 Voltage Reference
      3. 9.1.3 Application Curves
    2. 9.2 Initialization Set Up
      1. 9.2.1 Register Initialization During Operation
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 サポート・リソース
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Typical Characteristics

Typical values at TA = 25 °C, ADC sampling rate = 65 MSPS, AIN = –1 dBFS differential input, 50% clock duty cycle, AVDD = IOVDD = 1.8 V, external 1.6 V reference, 5 pF output load, unless otherwise noted.

GUID-20200811-CA0I-ZTKH-KFQG-ZQX83XBP5VNG-low.gif
DECIMATION BYPASS(1)
Figure 6-1 Single Tone FFT at FIN = 1.1 MHz
GUID-20200811-CA0I-GP0F-R5QL-GXDC6SDWCPX5-low.gif
DECIMATION BYPASS1
Figure 6-3 Single Tone FFT at FIN = 10 MHz
GUID-20200903-CA0I-2SNL-WC58-WQZWCN72KMTM-low.gif
AIN = -7 dBFS/tone, DECIMATION BYPASS1
Figure 6-5 Two Tone FFT at FIN = 3,4 MHz
GUID-20200903-CA0I-5WGX-HZKN-RGFPGQ6FGP1B-low.gif
AIN = -7 dBFS/tone, DECIMATION BYPASS1
Figure 6-7 Two Tone FFT at FIN = 10,12 MHz
GUID-20200825-CA0I-ZJK2-RMB2-PRLF4HQM7GL3-low.gif
Decimation by 32, complex. NCO = 10.1 MHz
Figure 6-9 Single Tone FFT at FIN = 10 MHz
GUID-20200901-CA0I-DMF0-29HJ-3MCFVWWMKZ3H-low.gif
DECIMATION BYPASS1
Figure 6-11 ENOB vs Input Frequency
GUID-20200901-CA0I-ZG10-JQ7H-WTLPKS3K8VTZ-low.gif
FIN = 5 MHz, DECIMATION BYPASS1
Figure 6-13 AC Performance vs Sampling Rate
GUID-20200827-CA0I-TH8V-CLQL-S5SVHJX6GTLG-low.gif
FIN = 5 MHz, DECIMATION BYPASS1
Figure 6-15 AC Performance vs Clock Duty cycle
GUID-20200901-CA0I-WRF4-4L9Z-C0MGKQRMQ8QT-low.gif
FIN = 5 MHz, DECIMATION BYPASS1
Figure 6-17 ENOB vs AVDD
GUID-20200918-CA0I-0JNH-GQ0M-4TMP71L88XMD-low.gif
DECIMATION BYPASS1
Figure 6-19 DC Offset Histogramm
GUID-20200903-CA0I-G1TT-XMXH-HCKKDM5THRFX-low.gif
FIN = 5 MHz, DECIMATION BYPASS1
Figure 6-21 DNL vs Code
GUID-20200811-CA0I-NCPW-GFHG-LXPN8TVM0FFK-low.gif
FS = 25 MSPS, AIN = –20 dBFS, DECIMATION BYPASS1
Figure 6-23 Single Tone FFT at FIN = 1.1 MHz
GUID-20200825-CA0I-CXDW-7VL9-V4RSCDVQJD5M-low.gif
FS = 25 MSPS, Decimation by 8, real
Figure 6-25 Single Tone FFT at FIN = 1 MHz
GUID-20200811-CA0I-F3SK-4CTQ-LV3VCCHDSKHR-low.gif
FS = 25 MSPS, DECIMATION BYPASS1
Figure 6-27 ENOB vs Input Frequency
GUID-20200901-CA0I-BCKC-BQWQ-BX9B3SGFCPMR-low.gif
FS = 25 MSPS, FIN = 5 MHz, DECIMATION BYPASS1
Figure 6-29 AC Performance vs Clock Amplitude
GUID-20200901-CA0I-ZFCR-ZGMT-CNPBWTN69J46-low.gif
FS = 25 MSPS, FIN = 5 MHz, DECIMATION BYPASS1
Figure 6-31 AC Performance vs VCM vs Temperature
GUID-20200903-CA0I-NF3P-9CDB-M2VJT3JQCTL8-low.gif
FS = 25 MSPS, FIN = 5 MHz, DECIMATION BYPASS1
Figure 6-33 DNL vs Code
GUID-20200911-CA0I-HTP1-R4LL-S3NXKNT1V6L4-low.gif
FIN = 5 MHz, 50 mVpp signal on AVDD
Figure 6-35 PSRR vs Frequency
GUID-20200909-CA0I-KJCM-QZ8L-GWQ7LR4RQLB3-low.gif
FIN = 1 MHz, 16-bit resolution, 2-w
Figure 6-37 IIOVDD Current vs Decimation
GUID-20200811-CA0I-SKFM-JF1P-1C9FHTGT4NR7-low.gif
AIN = –20 dBFS, DECIMATION BYPASS1
Figure 6-2 Single Tone FFT at FIN = 1.1 MHz
GUID-20200903-CA0I-QB0D-GG5S-2NRRHKTXQZJP-low.gif
DECIMATION BYPASS1
Figure 6-4 Single Tone FFT at FIN = 40 MHz
GUID-20200903-CA0I-RXDB-6G5Q-VW42NPSFX1DL-low.gif
AIN = -20 dBFS/tone, DECIMATION BYPASS1
Figure 6-6 Two Tone FFT at FIN = 3,4 MHz
GUID-20200825-CA0I-JVX1-SLRC-VDFVKHWW400K-low.gif
Decimation by 16, real
Figure 6-8 Single Tone FFT at FIN = 1 MHz
GUID-20200901-CA0I-KZ2P-PKHC-S3ZCWXDFPTQX-low.gif
DECIMATION BYPASS1
Figure 6-10 AC Performance vs Input Frequency
GUID-20200901-CA0I-9GQW-6ZWR-SNSC7ZD3GWSF-low.gif
FIN = 5 MHz, DECIMATION BYPASS1
Figure 6-12 AC Performance vs Input Amplitude
GUID-20200901-CA0I-QB0T-NCSF-5ZXH1GZ0QWNZ-low.gif
DECIMATION BYPASS1
Figure 6-14 AC Performance vs Clock Amplitude
GUID-20200811-CA0I-DLSS-SB9Z-NNSHXVQ7PC9Q-low.gif
FIN = 5 MHz, DECIMATION BYPASS1
Figure 6-16 AC Performance vs AVDD
GUID-20200901-CA0I-PGQJ-SBRB-8QCS5ZF1TFWC-low.gif
FIN = 5 MHz, DECIMATION BYPASS1
Figure 6-18 AC Performance vs VCM vs Temperature
GUID-20200903-CA0I-9TJL-SNNV-4WN8XGVHB3W1-low.gif
FIN = 5 MHz, DECIMATION BYPASS1
Figure 6-20 INL vs Code
GUID-20200811-CA0I-2SDM-N8Z9-B8XKQRGLHTTV-low.gif
FS = 25 MSPS, DECIMATION BYPASS1
Figure 6-22 Single Tone FFT at FIN = 1.1 MHz
GUID-20200811-CA0I-VDWZ-ZMKC-G05QCJ0RG8MF-low.gif
FS = 25 MSPS, DECIMATION BYPASS1
Figure 6-24 Single Tone FFT at FIN = 10 MHz
GUID-20200811-CA0I-NQSM-1ZCN-GVLRN7RFT40T-low.gif
FS = 25 MSPS, DECIMATION BYPASS1
Figure 6-26 AC Performance vs Input Frequency
GUID-20200901-CA0I-TMSD-12XM-RQXHHNRF0KVB-low.gif
FS = 25 MSPS, FIN = 5 MHz, DECIMATION BYPASS1
Figure 6-28 AC Performance vs Input Amplitude
GUID-20200811-CA0I-DPNR-K2R8-QN813SDR3PMT-low.gif
FS = 25 MSPS, FIN = 5 MHz, DECIMATION BYPASS1
Figure 6-30 AC Performance vs AVDD
GUID-20200903-CA0I-TW5K-5MJX-RHRNSMHXTRRL-low.gif
FS = 25 MSPS, FIN = 5 MHz, DECIMATION BYPASS1
Figure 6-32 INL vs Code
GUID-20200908-CA0I-PV3K-V1CX-W0DWHJBLR5DF-low.gif
Aggressor at -1 dBFS
Figure 6-34 Isolation vs Input Frequency
GUID-20200903-CA0I-NM5D-4ZKK-GD1JXPDKWSRR-low.gif
FIN = 1 MHz, 32x complex decimation, 16-bit resolution
Figure 6-36 Current vs Sampling Rate
GUID-20200908-CA0I-CCXZ-DSWH-Q8GFZDJ2CJHD-low.gif
FIN = 1 MHz, 32x complex decimation, 16-bit resolution, 2-w
Figure 6-38 IIOVDD Current vs Load Capacitance

Decimation bypass mode is for full Nyquist zone illustration only.