JAJSK90B December   2020  – November 2022 TPS7A43

PRODUCTION DATA  

  1. 特長
  2. アプリケーション
  3. 概要
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 MID_OUT Voltage Selection
      2. 7.3.2 Precision Enable
      3. 7.3.3 Dropout Voltage
      4. 7.3.4 Current Limit
      5. 7.3.5 Thermal Shutdown
      6. 7.3.6 Power Good
    4. 7.4 Device Functional Modes
      1. 7.4.1 Device Functional Mode Comparison
      2. 7.4.2 Normal Operation
      3. 7.4.3 Dropout Operation
      4. 7.4.4 Disabled
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 MID_OUT Voltage Setting
      2. 8.1.2 Adjustable Device Feedback Resistors
      3. 8.1.3 Recommended Capacitor Types
      4. 8.1.4 Input and Output Capacitor Requirements
      5. 8.1.5 Power Dissipation (PD)
      6. 8.1.6 Estimating Junction Temperature
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Examples
  9. Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
        1. 9.1.1.1 Evaluation Modules
        2. 9.1.1.2 Spice Models
      2. 9.1.2 Device Nomenclature
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 サポート・リソース
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  10. 10Mechanical, Packaging, and Orderable Information

Current Limit

The device has internal current limit circuits for both MID_OUT and OUT rails. These circuits protect the regulator during high-current load transient faults or shorting events on either rails. Both current limit circuits are brick-wall schemes with ICL(MID_OUT) being higher than ICL(OUT). In a high-current load transient fault, the brick-wall scheme limits the output current to the respective current limit (ICL(MID_OUT) or ICL(OUT)), both of which are listed in the Section 6.5 table.

When the device is in either current limit, the output voltages are not regulated. When a current limit event occurs, the device begins to heat up because of the increase in power dissipation. When the device is in either current limit, the corresponding pass transistor dissipates power. For instance, when the OUT rail is in current limit, the power dissipation can be calculated as [(VIN – VOUT) × ICL(OUT)]. If thermal shutdown is triggered, the device turns off. After the device cools down, the internal thermal shutdown circuit turns the device back on. If the faulty output current condition continues, the device cycles between current limit and thermal shutdown with approximately a 5-ms time constant. For more information on current limits, see the Know Your Limits application note.

Figure 7-4 shows a diagram of the current limit.

Figure 7-4 Current Limit: Brick-Wall Scheme