JAJSV77 September   1999  – January 2025 LMC7101

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Electrical Characteristics for VS = ±1.35V or 2.7V
    6. 5.6  Electrical Characteristics for VS = ±1.5V or 3V
    7. 5.7  Electrical Characteristics for VS = ±2.5V or 5V
    8. 5.8  Electrical Characteristics for VS = ±7.5V or 15V
    9. 5.9  Typical Characteristics for VS = 2.7V
    10. 5.10 Typical Characteristics for VS = 3V
    11. 5.11 Typical Characteristics for VS = 5V
    12. 5.12 Typical Characteristics for VS = 15V
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Benefits of the LMC7101 Tiny Amplifier
        1. 6.3.1.1 Size
        2. 6.3.1.2 Height
        3. 6.3.1.3 Signal Integrity
        4. 6.3.1.4 Simplified Board Layout
        5. 6.3.1.5 Low THD
        6. 6.3.1.6 Low Supply Current
        7. 6.3.1.7 Wide Voltage Range
    4. 6.4 Device Functional Modes
      1. 6.4.1 Input Common Mode
        1. 6.4.1.1 Input Common-Mode Voltage Range
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Rail-to-Rail Output
      2. 7.1.2 Capacitive Load Tolerance
      3. 7.1.3 Compensating for Input Capacitance When Using Large Value Feedback Resistors
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curve
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 ドキュメントの更新通知を受け取る方法
    3. 8.3 サポート・リソース
    4. 8.4 Trademarks
    5. 8.5 静電気放電に関する注意事項
    6. 8.6 用語集
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

7.1.2 Capacitive Load Tolerance

The LMC7101 can typically directly drive a 100pF load with VS = 15V at unity gain without oscillating. The unity gain follower is the most sensitive configuration. Direct capacitive loading reduces the phase margin of operational amplifiers. The combination of the output impedance and the capacitive load of the operational amplifier induces phase lag, which results in either an underdamped pulse response or oscillation.

Capacitive load compensation can be accomplished using resistive isolation as shown in Figure 7-1. This simple technique is useful for isolating the capacitive input of multiplexers and A/D converters.

LMC7101 Resistive Isolation of a 330pF Capacitive Load Figure 7-1 Resistive Isolation of a 330pF Capacitive Load