JAJSW16D November   2011  – January 2025 TLV70012-Q1 , TLV70018-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Internal Current Limit
      2. 6.3.2 Dropout Voltage
      3. 6.3.3 Undervoltage Lockout (UVLO)
      4. 6.3.4 Thermal Shutdown
    4. 6.4 Device Functional Modes
      1. 6.4.1 Shutdown
      2. 6.4.2 Operation with VIN Less than 2V
      3. 6.4.3 Operation with VIN Greater than 2V
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Input and Output Capacitor Requirements
        2. 7.2.2.2 Transient Response
      3. 7.2.3 Application Curve
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
        1. 7.4.1.1 Thermal Considerations
        2. 7.4.1.2 Power Dissipation
          1. 7.4.1.2.1 Thermal Calculations
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Device Nomenclature
      2. 8.1.2 Package Mounting
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 ドキュメントの更新通知を受け取る方法
    4. 8.4 サポート・リソース
    5. 8.5 Trademarks
    6. 8.6 静電気放電に関する注意事項
    7. 8.7 用語集
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

4 Pin Configuration and Functions

TLV70018-Q1 TLV70012-Q1 DDC Package,5-Pin SOT(Top View) Figure 4-1 DDC Package,5-Pin SOT(Top View)
Table 4-1 Pin Functions
PIN DESCRIPTION
NO. NAME
1 IN Input pin. A small 1μF ceramic capacitor is recommended from this pin to ground to provide stability and good transient performance.(1)
2 GND Ground pin
3 EN Enable pin. Driving EN over 0.9V turns on the regulator. Driving EN below 0.4V puts the regulator into shutdown mode and reduces operating current to 1μA, nominal.
4 NC No connection. This pin can be tied to ground to improve thermal dissipation.
5 OUT Regulated output voltage pin. A small 1μF ceramic capacitor is needed from this pin to ground to provide stability.(1)
(1) See the Input and Output Capacitor Requirements section for more details.