The ADS1258 requires a high-frequency system clock to oversample the inputs and provide digital data at the output data rate. By default, a 16-MHz system clock is provided by the PHI controller board. The PHI also generates the SCLK signal from the same clock domain, which improves overall ADC performance.

An external clock can also be used with the ADS1258EVM, though this setup requires altering the EVM components. First, install SMA connector J8, then remove termination resistor R17 and install this component at R7. Figure 3-5 shows the external clocking circuit. See the ADS1258 data sheet for information about the allowable clock frequency range.

Figure 3-5 ADS1258EVM Clock Circuit