SBOA563 March   2023 JFE2140

 

  1.   Abstract
  2.   Trademarks
  3. 1Introduction
  4. 2Theory of Operation
  5. 3Stability
  6. 4Summary

Stability

The loop parameters A, and 1/β can be determined in simulation by breaking the loop. This is accomplished in a SPICE simulator by driving the loop with VLoop as shown in #FIG_EMQ_N13_4VB.

Figure 3-1 Loop Analysis for Preamp With JFE2140 Front End Using the Small-Signal T-Model

At high frequencies the inductor L1 is an open and the capacitor C2 is a short. This method isolates the circuits A and β, to plot the frequency response of each, as shown in #FIG_GJ3_DB3_4VB.

Figure 3-2 Stability Analysis

The upper –3 dB point of Acl occurs when A and 1/β meet. Breaking the loop also allows the designer to check for circuit stability as shown with the loop gain (A × β) phase plot in #FIG_GJ3_DB3_4VB. At the point of intersection of A and 1/β, the phase margin = 180° – 90° = 90°. A capacitor placed across resistor RF in the β circuit can improve stability in applications that are susceptible to instability. Applications that drive heavy capacitive loads can benefit from an isolation resistor placed outside the loop on vout.