SFFS817 March 2024 SN74AXC1T45-Q1
4 Pin Failure Mode Analysis (Pin FMA)
This section provides a failure mode analysis (FMA) for the pins of the SN74AXC1T45-Q1 (SC70 and SON packages). The failure modes covered in this document include the typical pin-by-pin failure scenarios:
- Pin short-circuited to ground (see Table 4-2)
- Pin open-circuited (see Table 4-3)
- Pin short-circuited to an adjacent pin (see Table 4-4)
- Pin short-circuited to supply (see Table 4-5 and Table 4-6)
Table 4-2 through Table 4-6 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.
Table 4-1 TI Classification of Failure Effects
| Class | Failure Effects |
|---|---|
| A | Potential device damage that affects functionality |
| B | No device damage, but loss of functionality |
| C | No device damage, but performance degradation |
| D | No device damage, no impact to functionality or performance |
Pin Diagram shows the SN74AXC1T45-Q1 pin diagram. For a detailed description of the device pins, see the Pin Configuration and Functions section in the SN74AXC1T45-Q1 data sheet.
Figure 4-1 Pin DiagramFollowing are the assumptions of use and the device configuration assumed for the pin FMA in this section:
- Pin short-circuited to Ground (see Table 4-2)
- Pin open-circuited (see Table 4-3)
- Pin short-circuited to an adjacent pin (see Table 4-4)
- Pin short-circuited to VCCA (see Table 4-5)
- Pin short-circuited to VCCB (see Table 4-6)
Table 4-2 Pin FMA for Device Pins Short-Circuited to Ground
| Pin Name | Pin No. | Description of Potential Failure Effect(s) | Failure Effect Class |
|---|---|---|---|
| VCCA | 1 | GND short to VCC, device will be bypassed; may cause system damage, but not device damage | B |
| GND | 2 | Normal Operation | D |
| A | 3 | If configured as an output then damage is possible. If configured as input, no damage, but output will not switch | A |
| B | 4 | If configured as an output then damage is possible. If configured as input, no damage, but output will not switch | A |
| DIR | 5 | Direction control will fix B --> A direction | B |
| VCCB | 6 | GND short to VCC, device will be bypassed - may cause system damage, but not device damage | B |
Table 4-3 Pin FMA for Device Pins Open-Circuited
| Pin Name | Pin No. | Description of Potential Failure Effect(s) | Failure Effect Class |
|---|---|---|---|
| VCCA | 1 | Device will not be powered | B |
| GND | 2 | Device will not be powered | B |
| A | 3 | If configured as output, normal operation. If configured as input, no damage, but output will not switch | B |
| B | 4 | If configured as output, normal operation. If configured as input, no damage, but output will not switch | B |
| DIR | 5 | Direction control will fix B --> A direction | B |
| VCCB | 6 | Device will not be powered | B |
Table 4-4 Pin FMA for Device Pins Short-Circuited to Adjacent Pin
| Pin Name | Pin No. | Shorted to | Description of Potential Failure Effect(s) | Failure Effect Class |
|---|---|---|---|---|
| VCCA | 1 | GND | GND short to VCC, device will be bypassed; may cause system damage, but not device damage | B |
| GND | 2 | A | If A is configured as an output then damage is possible. If configured as input, output will be fixed LOW | A |
| A | 3 | B | Both bits will have the same value always, but could have bus contention during transitions that may cause high current | A |
| B | 4 | DIR | If DIR is LOW, B will be an input and drive the output LOW. If DIR is HIGH, B will be an output and damage is possible based on state of A. | A |
| DIR | 5 | VCCB | If VCCB>VCCA, DIR will fix B --> A direction OR if VCCB<VCCA, input could be inappropriate logic level potentially causing damage | A |
| VCCB | 6 | VCCA | VCCB short to VCCA, device will be bypassed; may cause system damage, but not device damage | B |
Table 4-5 Pin FMA for Device Pins Short-Circuited to VCCA
| Pin Name | Pin No. | Description of Potential Failure Effect(s) | Failure Effect Class |
|---|---|---|---|
| VCCA | 1 | Normal Operation | D |
| GND | 2 | GND short to VCC, device will be bypassed; may cause system damage, but not device damage | B |
| A | 3 | If configured as an output then damage is possible. If configured as input, no damage, but output will not switch | A |
| B | 4 | If configured as an output then damage is possible. If configured as input, damage is possible if VIH/VIL not met | A |
| DIR | 5 | Direction control will fix A --> B direction | B |
| VCCB | 6 | VCCA short to VCCB, device will be bypassed; may cause system damage, but not device damage | B |
Table 4-6 Pin FMA for Device Pins Short-Circuited to VCCB
| Pin Name | Pin No. | Description of Potential Failure Effect(s) | Failure Effect Class |
|---|---|---|---|
| VCCA | 1 | VCCB short to VCCA, device will be bypassed; may cause system damage, but not device damage | B |
| GND | 2 | GND short to VCC, device will be bypassed; may cause system damage, but not device damage | B |
| A | 3 | If configured as an output then damage is possible. If configured as input, damage is possible if VIH/VIL not met | A |
| B | 4 | If configured as an output then damage is possible. If configured as input, no damage, but output will not switch | A |
| DIR | 5 | If VCCB>VCCA, DIR will fix B --> A direction OR if VCCB is less than VCCA, input could be inappropriate logic level potentially causing damage | A |
| VCCB | 6 | Normal Operation | D |