SFFS826A February   2024  – April 2024 LDC0851

 

  1.   1
  2.   Trademarks
  3. 1Overview
  4. 2Functional Safety Failure In Time (FIT) Rates
  5. 3Failure Mode Distribution (FMD)
  6. 4Pin Failure Mode Analysis (Pin FMA)
  7. 5Revision History

Pin Failure Mode Analysis (Pin FMA)

This section provides a failure mode analysis (FMA) for the pins of the LDC0851. The failure modes covered in this document include the typical pin-by-pin failure scenarios:

  • Pin short-circuited to ground (see Table 4-2)
  • Pin open-circuited (see Table 4-3)
  • Pin short-circuited to an adjacent pin (see Table 4-4)
  • Pin short-circuited to supply (see Table 4-5)

Table 4-2 through Table 4-5 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.

Table 4-1 TI Classification of Failure Effects
ClassFailure Effects
APotential device damage that affects functionality.
BNo device damage, but loss of functionality.
CNo device damage, but performance degradation.
DNo device damage, no impact to functionality or performance.

Figure 4-1 shows the LDC0851 pin diagram. For a detailed description of the device pins, see the Pin Configuration and Functions section in the LDC0851 data sheet.

GUID-179B0463-4136-4C2E-A805-95CA4F9458D9-low.gif Figure 4-1 Pin Diagram

Following are the assumptions of use and the device configuration assumed for the pin FMA in this section:

  • Application circuit similar to the one found int the LDC0851 data sheet.
  • Voltage supply capable of sourcing a lot of current like a battery.
Table 4-2 Pin FMA for Device Pins Short-Circuited to Ground
Pin Name Pin No. Description of Potential Failure Effects Failure Effect Class
LCOM 1 LC tank oscillating signal expected to collapse while short present. While oscillator signal not properly functioning, switch not expected to trigger when target is present. B
LSENSE 2 LC tank oscillating signal expected to collapse while short present. While oscillator signal not properly functioning, switch not expected to trigger when target is present. B
LREF 3 LC tank oscillating signal expected to collapse while short present. While oscillator signal not properly functioning, switch not expected to trigger when target is present. B
ADJ 4 Sets improper threshold at startup. Intended threshold not used until short removed and enable toggled. B or C
OUT 5 Device output pulled low. How low the potential pulled depends on the resistance of the short. For a strong short, switch output behavior completely lost. B or C
EN 6 Acceptable operating mode, device will remain in shutdown mode. No meaningful measurement data can be collected. Device will output high. B
GND 7 Normal Operation D
VDD 8 A lot of current may be sourced external to the device, with the current only being limited by the source that supplies VDD and the resistance of the short. Depending on the layout and where the short is and the duration of the short, the part may heat up and be damaged. Thermal damage expected if the supply can source high current, there is a very low resistance path between the supply and LDC0851 supply pin, and the short is directly at the LDC0851 pins, and the short lasts for an order longer than a few microseconds. A or B
Table 4-3 Pin FMA for Device Pins Open-Circuited
Pin Name Pin No. Description of Potential Failure Effects Failure Effect Class
LCOM 1 Irregular signals expected between LCOM and LSENSE as well as LCOM and LREF. Proper functionality lost. B
LSENSE 2 Irregular signal between LSENSE and LCOM expected; device not functioning as intended. B
LREF 3 Irregular signal between LREF and LCOM expected; device not functioning as intended. B
ADJ 4 Switching distance unpredictable C
OUT 5 Device not damaged, equivalent to connecting to a high input impedance. System likely affected, but not device. D
EN 6 Enable potential undefined; can remain in shutdown mode or active mode. System unable to control device state and adjust target thresholds. B
GND 7 Not functional and not damaged. B
VDD 8 Device not properly powered, intended operation not expected. B
Table 4-4 Pin FMA for Device Pins Short-Circuited to Adjacent Pin
Pin Name Pin No. Shorted to Description of Potential Failure Effects Failure Effect Class
LCOM 1 2-LSENSE LC tank signal collapses while short present. Output low regardless of metal target present or not. B
LSENSE 2 3-LREF Inductances in parallel, potentially insufficient inductance. Sense inductance and Ref inductance identical, output should remain whether target present or not. B
LREF 3 4-ADJ Sets improper threshold at startup. Intended threshold not used until short removed and enable toggled. C
ADJ 4 5-OUT ADJ setting undefined. Device may not trigger for intended range. C
OUT 5 6-EN OUT railing low or High depending on the setting for EN, board trace resistance and supply's ability to source current . If EN open circuited, erratic behavior expected. B
EN 6 7-GND Acceptable operating mode; device will remain in shutdown mode. No meaningful measurement data can be collected. Device will output high. B
GND 7 8-VDD A lot of current may be sourced external to the device, with the current only being limited by the source that supplies VDD and the resistance of the short. Depending on the layout and where the short is and the duration of the short, the part may heat up and be damaged. Thermal damage expected if the supply can source high current, there is a very low resistance path between the supply and LDC0851 supply pin, and the short is directly at the LDC0851 pins, and the short lasts for an order longer than a few microseconds. A or B
VDD 8 1-LCOM LC tank oscillating signal expected to collapse while short present. While oscillator signal not properly functioning, switch not expected to trigger when target is present. B
Table 4-5 Pin FMA for Device Pins Short-Circuited to supply
Pin Name Pin No. Description of Potential Failure Effects Failure Effect Class
LCOM 1 LC tank oscillating signal expected to collapse while short present. While oscillator signal not properly functioning; switch is not expected to trigger when target is present. B
LSENSE 2 LC tank oscillating signal expected to collapse while short present. While oscillator signal not properly functioning; switch is not expected to trigger when target is present. B
LREF 3 LC tank oscillating signal expected to collapse while short present. While oscillator signal not properly functioning; switch is not expected to trigger when target is present. B
ADJ 4 ADJ voltage potentially exceeding absolute maximum rating if VDD > 2V, short strong, and VDD capable of sourcing a lot of current. If device continues to operate, ADJ will be set to the highest value, switching distance will be maximally reduced. Device may never trigger for intended range. A or B
OUT 5 When target present (fSense>fRef, Lsense< Lref), device expected to sink more current, but not so much as to exceed 5mA. B
EN 6 Acceptable operating mode. Device will always be enabled. This can be detrimental to device attempting to toggle EN pin, but not to LDC0851. LDC0851 shutdown capability lost; typical system current budget can increase. B or D
GND 7 A lot of current may be sourced external to the device, with the current only being limited by the source that supplies VDD and the resistance of the short. Depending on the layout and where the short is and the duration of the short, the part can heat up and sustain damage. Thermal damage expected if the supply can source high current, there is a very low resistance path between the supply and LDC0851 supply pin, and the short is directly at the LDC0851 pins, and the short lasts for an order longer than a few microseconds. B
VDD 8 Normal operation. D