SLAAE23 June   2021 DAC43204 , DAC53004 , DAC53204 , DAC63204

 

  1.   Design Objective
  2.   Design Description
  3.   Design Notes
  4.   Design Simulations
    1.     Transient Simulation Results
  5.   Register Settings
  6.   Pseudo Code Example
  7.   Design Featured Devices
  8.   Design References

Design Description

This circuit uses a four-channel buffered current output DAC to voltage margin a switch-mode power supply (SMPS). A voltage margining circuit is used to trim, scale, or test the output of a power converter. Adjustable power supplies, such as low dropout regulators (LDOs), DC/DC converters, or SMPS provide a feedback (FB) input that is used to control the desired output. A precision smart DAC, such as the DAC43204, provides linear control of the power supply output when the DAC is supplied and the output is powered on. Most DACs include an internal pulldown resistor at the voltage output when the DAC is supplied but the output is in power down mode. Also, when most DACs are completely powered off, the ESD cells on the output pin conduct current if the output is pulled away from ground which is the case in voltage margining circuits. The DAC43204 provides a high-impedance (Hi-Z) output when the DAC is powered off or when the output channel is in power down mode, meaning that the DAC draws very little current through the FB pin of the SMPS and the output is set at the nominal voltage. The DAC43204 has a general-purpose input (GPI) pin that allows the DAC output to be toggled between a high- and low-current output. This allows the SMPS to be toggled within ±10% of the nominal output value. All register settings can be saved using the non-volatile memory (NVM) on the DAC43204 meaning that the device can be used without a processor, even after a power cycle. This circuit can be used in applications such as communications equipment, enterprise systems, test and measurement, and general-purpose power-supply modules.