SLAU904A October   2023  – December 2023

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  8. 2Hardware
    1. 2.1 Setup
    2. 2.2 AC-MB Settings
      1. 2.2.1 Audio Serial Interface Settings
        1. 2.2.1.1 USB Mode
        2. 2.2.1.2 Optical or Auxiliary Analog Audio Input Mode
        3. 2.2.1.3 External Audio Interface Mode
      2. 2.2.2 AC-MB Power Supply
    3. 2.3 TAx5x42EVM-K Hardware Settings
      1. 2.3.1 TAx5x42 EVM Input Hardware Settings
        1. 2.3.1.1 Line Inputs
        2. 2.3.1.2 On-board Microphone Input
      2. 2.3.2 TAx5x42 EVM Output Hardware Settings
        1. 2.3.2.1 TAx5x42 Analog Audio Output
      3. 2.3.3 Multi-Function Hardware Configurations
        1. 2.3.3.1 MD0 Hardware Configurations
        2. 2.3.3.2 MD1 and MD2 Hardware Configurations
        3. 2.3.3.3 MD3 Hardware Configurations
        4. 2.3.3.4 MD4 and MD5 Hardware Configurations
        5. 2.3.3.5 MD6 (DIN/DOUT) Hardware Configuration
  9. 3Software
    1. 3.1 System Overview
    2. 3.2 Configuration Example
  10. 4Hardware Design Files
    1. 4.1 Schematics
    2. 4.2 PCB Layout
    3. 4.3 Bill of Materials (BOM)
      1. 4.3.1 TAC5242 EVM Bill of Materials
      2. 4.3.2 TAC5142 EVM Bill of Materials
      3. 4.3.3 TAA5242 EVM Bill of Materials
      4. 4.3.4 TAD5242 EVM Bill of Materials
      5. 4.3.5 TAD5142 EVM Bill of Materials
  11. 5Additional Information
    1. 5.1 Trademarks
  12. 6References
  13. 7Revision History

2.3.3.2 MD1 and MD2 Hardware Configurations

MD1 and MD2 settings provide the following configuration for these devices as shown in the table below.

Table 2-4 MD1 and MD2 Setting
MD1,MD2TAC5242TAC5142TAA5242 (ADC only variant)TAD5242/TAD5142 (DAC only variant)
Target ModeController ModeTarget ModeController ModeTarget ModeController ModeTarget ModeController Mode

2'b00

AVDD=3.3V, Word Length= 32, Linear Phase Decimation/Interpolation

Frame Rate= MCLK/256, Word Length=32, BCLK=64Fs for Controller I2S, BCLK=128Fs (up to 96K), BCLK=64Fs for higher Rates for Controller TDM

AVDD=3.3V, Word Length= 32, Linear Phase Decimation/Interpolation

Frame Rate= MCLK/256, Word Length=32, BCLK=64Fs for Controller I2S, BCLK=128Fs (up to 96K), BCLK=64Fs for higher Rates for Controller TDM

AVDD=3.3V, Word Length= 32, Linear Phase Decimation/Interpolation

Frame Rate= MCLK/256, Word Length=32, BCLK=64Fs for Controller I2S, BCLK=256Fs(up to 48K Fs), BCLK=128Fs (up to 96K), BCLK=64Fs for higher Rates for Controller TDM

AVDD=3.3V, Word Length= 32, Linear Phase Decimation/Interpolation

Frame Rate= MCLK/256, Word Length=32, BCLK=64Fs for Controller I2S, BCLK=256Fs(up to 48K Fs), BCLK=128Fs (up to 96K), BCLK=64Fs for higher Rates for Controller TDM

2'b01

AVDD=1.8V, Word Length= 32, Linear Phase Decimation/Interpolation

Frame Rate= MCLK/128, Word Length=32, BCLK=64Fs for Controller I2S, BCLK=128Fs (up to 96K), BCLK=64Fs for higher Rates for Controller TDM

AVDD=1.8V, Word Length= 32, Linear Phase Decimation/Interpolation

Frame Rate= MCLK/128, Word Length=32, BCLK=64Fs for Controller I2S, BCLK=128Fs (up to 96K), BCLK=64Fs for higher Rates for Controller TDM

AVDD=1.8V, Word Length= 32, Linear Phase Decimation/Interpolation

Frame Rate= MCLK/128, Word Length=32, BCLK=64Fs for Controller I2S, BCLK=256Fs(up to 48K Fs), BCLK=128Fs (up to 96K Fs), BCLK=64Fs for higher Rates for Controller TDM

AVDD=1.8V, Word Length= 32, Linear Phase Decimation/Interpolation

Frame Rate= MCLK/128, Word Length=32, BCLK=64Fs for Controller I2S, BCLK=256Fs(up to 48K Fs), BCLK=128Fs (up to 96K Fs), BCLK=64Fs for higher Rates for Controller TDM

2'b10

AVDD=3.3V, Word Length= 24, Linear Phase Decimation/Interpolation

Frame Rate=96/88.2 KSPS Word Length=32, BCLK=64Fs for Controller I2S, BCLK=128FS for Controller TDM

AVDD=3.3V, Word Length= 24, Linear Phase Decimation/Interpolation

Frame Rate=96/88.2 KSPS Word Length=32, BCLK=64Fs for Controller I2S, BCLK=128FS for Controller TDM

AVDD=3.3V, Word Length= 24, Linear Phase Decimation/Interpolation

Frame Rate=96/88.2 KSPS Word Length=32, BCLK=64Fs for Controller I2S, BCLK=128FS for Controller TDM

AVDD=3.3V, Word Length= 24, Linear Phase Decimation/Interpolation

Frame Rate=96/88.2 KSPS Word Length=32, BCLK=64Fs for Controller I2S, BCLK=128FS for Controller TDM

2'b11

AVDD=3.3V, Word Length= 16, Linear Phase Decimation/Interpolation

Frame Rate = 48/44.1 KSPS Word Length=32, BCLK=64Fs for Controller I2S, BCLK=128FS for Controller TDM

AVDD=3.3V, Word Length= 16, Linear Phase Decimation/Interpolation

Frame Rate = 48/44.1 KSPS Word Length=32, BCLK=64Fs for Controller I2S, BCLK=128FS for Controller TDM

AVDD=3.3V, Word Length= 16, Linear Phase Decimation/Interpolation

Frame Rate = 48/44.1 KSPS Word Length=32, BCLK=64Fs for Controller I2S, BCLK=256FS for Controller TDM

AVDD=3.3V, Word Length= 16, Linear Phase Decimation/Interpolation

Frame Rate = 48/44.1 KSPS Word Length=32, BCLK=64Fs for Controller I2S, BCLK=256FS for Controller TDM