This section provides a Failure Mode Analysis (FMA) for the pins of the SN6505x-Q1 (SOT-23 (6) package). The failure modes covered in this document include the typical pin-by-pin failure scenarios:
|A||Potential device damage that affects functionality|
|B||No device damage, but loss of functionality|
|C||No device damage, but performance degradation|
|D||No device damage, no impact to functionality or performance|
Following are the assumptions of use and the device configuration assumed for the pin FMA in this section:
External push-pull transformer connected with a winding between D1 and VCC, another winding connected between D2 and VCC.