SLUAA81A October   2020  – February 2022 BQ769142 , BQ76922 , BQ76942 , BQ76952

 

  1.   Trademarks
  2. 1Introduction
  3. 2Cell Balancing Circuit Considerations
    1. 2.1 Internal Cell-Balancing Circuit Design
    2. 2.2 External Cell-Balancing Circuit Design Using N-Channel FETs
    3. 2.3 External Cell-Balancing Circuit Design Using P-Channel FETs
    4. 2.4 External Cell-Balancing Circuit Design Using BJTs
    5. 2.5 Voltage Measurement Accuracy During Balance
  4. 3Stand-Alone Balancing Algorithm and Settings
  5. 4Considerations for a Host-Balancing Algorithm
  6. 5Timing Information
  7. 6Debugging Common Issues With Cell Balancing
    1. 6.1 Using a Resistor Divider as a Cell Simulator
  8. 7References
  9. 8Revision History

Using a Resistor Divider as a Cell Simulator

When testing the cell balancing feature with a power supply and resistor divider to simulate cells, this will often trigger the over-voltage protection which may be observed in the Safety Alert A register. This is because the resistor divider will pull on the voltages of the other cell inputs when cell balancing starts on one of the cells. This causes the voltages to become instable which triggers the over-voltage condition. Any time an over-voltage condition occurs, cell balancing is immediately disabled.

The best way to test the cell balancing feature is with real cells. One of the cells can be charged slightly higher or discharged slightly lower to initiate cell balancing. If real cells are not available, another option is to use a resistor divider with a second power supply connected across one of the cells. For example, if the main supply and resistor divider are set to provide 3.9 V on each cell input, a second supply set to 3.9 V can be connected across one of the cell inputs. Then the supply can be adjusted to 3.95 V to enable cell balancing.