SLUU182A January   2004  – March 2022 TPS5124

 

  1.   Trademarks
  2. 1Introduction
  3. 2Features
  4. 3Schematic
  5. 4Design Procedure
    1. 4.1 Frequency Setting
    2. 4.2 Inductance Value
    3. 4.3 Output Capacitors
    4. 4.4 Input Capacitors
      1. 4.4.1 Case One: D1, D2 < 0.5
      2. 4.4.2 Case Two: D2 < 0.5 < D1
    5. 4.5 Compensation Design
    6. 4.6 Current Limiting
    7. 4.7 Timer Latch
      1. 4.7.1 Undervoltage Protection
      2. 4.7.2 Short Circuit Protection
      3. 4.7.3 Overvoltage Protection
      4. 4.7.4 Disabling the Protection Function
        1. 4.7.4.1 Disabling the Overcurrent Protection
        2. 4.7.4.2 Disabling the Overvoltage Protection or Undervoltage Protection
  6. 5Test Results
    1. 5.1 Efficiency Curves
    2. 5.2 Typical Operating Waveform
    3. 5.3 Start-Up Waveform
    4. 5.4 Output Ripple Voltage and Load Transient
  7. 6Layout Guidelines
    1. 6.1 Low-Side MOSFET
    2. 6.2 Connections
    3. 6.3 Bypass Capacitor
    4. 6.4 Bootstrap Capacitor
    5. 6.5 Output Voltage
  8. 7PCB Layout
  9. 8List of Materials
  10. 9Revision History

4.7 Timer Latch

The TPS5124 includes fault latch function with a user-adjustable timer to latch the MOSFET drivers in case of a fault condition. When either the OVP or UVP comparator detects a fault condition, the timer starts to charge C18, the external capacitor connected to the SCP pin. The circuit is designed so that for any value of C18, the undervoltage latch time, tUVPL, is about five times larger than the overvoltage latch time tOVPL. The equations needed to calculate the required value of C18 for the desired overvoltage and undervoltage latch delay times are calculated in Equation 17 and Equation 18.

Equation 17. C 18 = 1.7   ×   10 - 6   ×   t U V P L 1.185
Equation 18. C 18 = 8   ×   10 - 6   ×   t O V P L 1.185

where

  • C18 is the external capacitor connected to the SCP pin.
  • tUVPL is the time from UVP detection to latch.
  • tOVPL is the time from OVP detection to latch.

For the EVM, tUVPL = 7 ms and tOVPL = 1.5 ms, so C18 = 0.01 μF.

If the voltage on the SCP pin reaches 1.185 V, the fault latch is set, and the MOSFET drivers are set as follows.