SLUUDE5 December   2025 LMK3H2108

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Configuration Overview
    1. 1.1 LMK3H2108A18 Configuration Information
  5. 2Revision History

1.1 LMK3H2108A18 Configuration Information

Table 1-1 LMK3H2108A18 Freuqency Configuration
OTP PageOUT0 (MHz)OUT1 (MHz)OUT2 (MHz)OUT3 (MHz)OUT4 (MHz)OUT5 (MHz)OUT6 (MHz)OUT7 (MHz)
OTP Page 0100100100100100100100100
OTP Page 1100100100100100100100100
OTP Page 2100100100100100100100100
OTP Page 3100100100100100100100100
Table 1-2 LMK3H2108A18 I2C Configuration
OTP PageI2C Configuration
OTP Page 0

I2C Address: 0x68

1 Byte Register Addressing

OTP Page 1

I2C Address: 0x68

1 Byte Register Addressing

OTP Page 2

I2C Address: 0x68

1 Byte Register Addressing

OTP Page 3

I2C Address: 0x68

1 Byte Register Addressing

OTP Page 0

Table 1-3 LMK3H2108A18 GPI Settings, OTP Page 0
GPI PinPin BehaviorPolarityInternal Pull-DownInternal Pull-Up
GPI0GPINormalEnabledDisabled
GPI1GPINormalEnabledDisabled
GPI2GPINormalEnabledDisabled
GPI3GPINormalEnabledDisabled
GPI4GPINormalEnabledDisabled
GPI5GPINormalEnabledDisabled
Table 1-4 LMK3H2108A18 GPIO Settings, OTP Page 0
GPIO PinPin BehaviorPolarityInternal Pull-DownInternal Pull-Up
GPIO0Dynamic OTPNormalEnabledDisabled
GPIO1Dynamic OTPNormalEnabledDisabled
GPIO2GPINormalEnabledDisabled
GPIO3Status Output, CLK_READYNormalEnabledDisabled
GPIO4Global OEInvertedEnabledDisabled
Table 1-5 LMK3H2108A18 Input Settings, OTP Page 0
InputPowered Up/DownInput FormatInput Termination
IN_0Powered DownN/A (IN0 Unused)None, DC
IN_1Powered DownN/A (IN1 Unused)None, DC
IN_2Powered DownN/A (IN2 Unused)None, DC
Table 1-6 LMK3H2108A18 Output Settings, OTP Page 0
OutputFrequency (MHz)FormatClock SourceOutput StateOE GroupSSC Behavior
OUT010085 Ω LP-HCSLPATH1EnabledGlobal OE OnlyDisabled
OUT110085 Ω LP-HCSLPATH1EnabledGlobal OE OnlyDisabled
OUT210085 Ω LP-HCSLPATH1EnabledGlobal OE OnlyDisabled
OUT310085 Ω LP-HCSLPATH1EnabledGlobal OE OnlyDisabled
OUT410085 Ω LP-HCSLPATH1EnabledGlobal OE OnlyDisabled
OUT510085 Ω LP-HCSLPATH1EnabledGlobal OE OnlyDisabled
OUT610085 Ω LP-HCSLPATH1EnabledGlobal OE OnlyDisabled
OUT710085 Ω LP-HCSLPATH1EnabledGlobal OE OnlyDisabled

OTP Page 1

Table 1-7 LMK3H2108A18 GPI Settings, OTP Page 1
GPI PinPin BehaviorPolarityInternal Pull-DownInternal Pull-Up
GPI0GPINormalEnabledDisabled
GPI1GPINormalEnabledDisabled
GPI2GPINormalEnabledDisabled
GPI3GPINormalEnabledDisabled
GPI4GPINormalEnabledDisabled
GPI5GPINormalEnabledDisabled
Table 1-8 LMK3H2108A18 GPIO Settings, OTP Page 1
GPIO PinPin BehaviorPolarityInternal Pull-DownInternal Pull-Up
GPIO0Dynamic OTPNormalEnabledDisabled
GPIO1Dynamic OTPNormalEnabledDisabled
GPIO2GPINormalEnabledDisabled
GPIO3Status Output, CLK_READYNormalEnabledDisabled
GPIO4Global OEInvertedEnabledDisabled
Table 1-9 LMK3H2108A18 Input Settings, OTP Page 1
InputPowered Up/DownInput FormatInput Termination
IN_0Powered DownN/A (IN0 Unused)None, DC
IN_1Powered DownN/A (IN1 Unused)None, DC
IN_2Powered DownN/A (IN2 Unused)None, DC
Table 1-10 LMK3H2108A18 Output Settings, OTP Page 1
OutputFrequency (MHz)FormatClock SourceOutput StateOE GroupSSC Behavior
OUT010085 Ω LP-HCSLPATH1EnabledGlobal OE OnlyEnabled, -0.25% Down-spread
OUT110085 Ω LP-HCSLPATH1EnabledGlobal OE OnlyEnabled, -0.25% Down-spread
OUT210085 Ω LP-HCSLPATH1EnabledGlobal OE OnlyEnabled, -0.25% Down-spread
OUT310085 Ω LP-HCSLPATH1EnabledGlobal OE OnlyEnabled, -0.25% Down-spread
OUT410085 Ω LP-HCSLPATH1EnabledGlobal OE OnlyEnabled, -0.25% Down-spread
OUT510085 Ω LP-HCSLPATH1EnabledGlobal OE OnlyEnabled, -0.25% Down-spread
OUT610085 Ω LP-HCSLPATH1EnabledGlobal OE OnlyEnabled, -0.25% Down-spread
OUT710085 Ω LP-HCSLPATH1EnabledGlobal OE OnlyEnabled, -0.25% Down-spread

OTP Page 2

Table 1-11 LMK3H2108A18 GPI Settings, OTP Page 2
GPI PinPin BehaviorPolarityInternal Pull-DownInternal Pull-Up
GPI0GPINormalEnabledDisabled
GPI1GPINormalEnabledDisabled
GPI2GPINormalEnabledDisabled
GPI3GPINormalEnabledDisabled
GPI4GPINormalEnabledDisabled
GPI5GPINormalEnabledDisabled
Table 1-12 LMK3H2108A18 GPIO Settings, OTP Page 2
GPIO PinPin BehaviorPolarityInternal Pull-DownInternal Pull-Up
GPIO0Dynamic OTPNormalEnabledDisabled
GPIO1Dynamic OTPNormalEnabledDisabled
GPIO2GPINormalEnabledDisabled
GPIO3Status Output, CLK_READYNormalEnabledDisabled
GPIO4Global OEInvertedEnabledDisabled
Table 1-13 LMK3H2108A18 Input Settings, OTP Page 2
InputPowered Up/DownInput FormatInput Termination
IN_0Powered DownN/A (IN0 Unused)None, DC
IN_1Powered DownN/A (IN1 Unused)None, DC
IN_2Powered DownN/A (IN2 Unused)None, DC
Table 1-14 LMK3H2108A18 Output Settings, OTP Page 2
OutputFrequency (MHz)FormatClock SourceOutput StateOE GroupSSC Behavior
OUT010085 Ω LP-HCSLPATH1EnabledGlobal OE OnlyEnabled, -0.3% Down-spread
OUT110085 Ω LP-HCSLPATH1EnabledGlobal OE OnlyEnabled, -0.3% Down-spread
OUT210085 Ω LP-HCSLPATH1EnabledGlobal OE OnlyEnabled, -0.3% Down-spread
OUT310085 Ω LP-HCSLPATH1EnabledGlobal OE OnlyEnabled, -0.3% Down-spread
OUT410085 Ω LP-HCSLPATH1EnabledGlobal OE OnlyEnabled, -0.3% Down-spread
OUT510085 Ω LP-HCSLPATH1EnabledGlobal OE OnlyEnabled, -0.3% Down-spread
OUT610085 Ω LP-HCSLPATH1EnabledGlobal OE OnlyEnabled, -0.3% Down-spread
OUT710085 Ω LP-HCSLPATH1EnabledGlobal OE OnlyEnabled, -0.3% Down-spread

OTP Page 3

Table 1-15 LMK3H2108A18 GPI Settings, OTP Page 3
GPI PinPin BehaviorPolarityInternal Pull-DownInternal Pull-Up
GPI0GPINormalEnabledDisabled
GPI1GPINormalEnabledDisabled
GPI2GPINormalEnabledDisabled
GPI3GPINormalEnabledDisabled
GPI4GPINormalEnabledDisabled
GPI5GPINormalEnabledDisabled
Table 1-16 LMK3H2108A18 GPIO Settings, OTP Page 3
GPIO PinPin BehaviorPolarityInternal Pull-DownInternal Pull-Up
GPIO0Dynamic OTPNormalEnabledDisabled
GPIO1Dynamic OTPNormalEnabledDisabled
GPIO2GPINormalEnabledDisabled
GPIO3Status Output, CLK_READYNormalEnabledDisabled
GPIO4Global OEInvertedEnabledDisabled
Table 1-17 LMK3H2108A18 Input Settings, OTP Page 3
InputPowered Up/DownInput FormatInput Termination
IN_0Powered DownN/A (IN0 Unused)None, DC
IN_1Powered DownN/A (IN1 Unused)None, DC
IN_2Powered DownN/A (IN2 Unused)None, DC
Table 1-18 LMK3H2108A18 Output Settings, OTP Page 3
OutputFrequency (MHz)FormatClock SourceOutput StateOE GroupSSC Behavior
OUT010085 Ω LP-HCSLPATH1EnabledGlobal OE OnlyEnabled, -0.5% Down-spread
OUT110085 Ω LP-HCSLPATH1EnabledGlobal OE OnlyEnabled, -0.5% Down-spread
OUT210085 Ω LP-HCSLPATH1EnabledGlobal OE OnlyEnabled, -0.5% Down-spread
OUT310085 Ω LP-HCSLPATH1EnabledGlobal OE OnlyEnabled, -0.5% Down-spread
OUT410085 Ω LP-HCSLPATH1EnabledGlobal OE OnlyEnabled, -0.5% Down-spread
OUT510085 Ω LP-HCSLPATH1EnabledGlobal OE OnlyEnabled, -0.5% Down-spread
OUT610085 Ω LP-HCSLPATH1EnabledGlobal OE OnlyEnabled, -0.5% Down-spread
OUT710085 Ω LP-HCSLPATH1EnabledGlobal OE OnlyEnabled, -0.5% Down-spread