SLUUDG1 December   2025 LMK3H2108

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Configuration Overview
    1. 1.1 LMK3H2108A11 Configuration Information
  5. 2Revision History

1.1 LMK3H2108A11 Configuration Information

Table 1-1 LMK3H2108A11 Freuqency Configuration
OTP PageOUT0 (MHz)OUT1 (MHz)OUT2 (MHz)OUT3 (MHz)OUT4 (MHz)OUT5 (MHz)OUT6 (MHz)OUT7 (MHz)
OTP Page 0100100100100100100100100
OTP Page 1100100100100100100100100
OTP Page 2100100100100100100100100
OTP Page 3100100100100100100100100
Table 1-2 LMK3H2108A11 I2C Configuration
OTP PageI2C Configuration
OTP Page 0

I2C Address: 0x68

1 Byte Register Addressing

OTP Page 1

I2C Address: 0x68

1 Byte Register Addressing

OTP Page 2

I2C Address: 0x68

1 Byte Register Addressing

OTP Page 3

I2C Address: 0x68

1 Byte Register Addressing

OTP Page 0

Table 1-3 LMK3H2108A11 GPI Settings, OTP Page 0
GPI PinPin BehaviorPolarityInternal Pull-DownInternal Pull-Up
GPI0GPINormalDisabledDisabled
GPI1GPINormalDisabledDisabled
GPI2GPINormalEnabledDisabled
GPI3GPINormalEnabledDisabled
GPI4Group OE, OE_GROUP_4InvertedDisabledEnabled
GPI5Group OE, OE_GROUP_5InvertedDisabledEnabled
Table 1-4 LMK3H2108A11 GPIO Settings, OTP Page 0
GPIO PinPin BehaviorPolarityInternal Pull-DownInternal Pull-Up
GPIO0Dynamic OTPNormalEnabledDisabled
GPIO1Dynamic OTPNormalEnabledDisabled
GPIO2I2C Bit 0NormalEnabledDisabled
GPIO3I2C Bit 1NormalEnabledDisabled
GPIO4GPINormalDisabledEnabled
Table 1-5 LMK3H2108A11 Input Settings, OTP Page 0
InputPowered Up/DownInput FormatInput Termination
IN_0Powered UpDifferential IN0100 Ω P to N
IN_1Powered DownN/A (IN1 Unused)None, DC
IN_2Powered DownN/A (IN2 Unused)None, DC
Table 1-6 LMK3H2108A11 Output Settings, OTP Page 0
OutputFrequency (MHz)FormatClock SourceOutput StateOE GroupSSC Behavior
OUT0100100 Ω LP-HCSLIN_0EnabledOE_GROUP_5Disabled
OUT1100100 Ω LP-HCSLIN_0EnabledOE_GROUP_4Disabled
OUT2100100 Ω LP-HCSLIN_0EnabledOE_GROUP_4Disabled
OUT3100100 Ω LP-HCSLIN_0EnabledOE_GROUP_4Disabled
OUT4100100 Ω LP-HCSLIN_0EnabledOE_GROUP_4Disabled
OUT5100100 Ω LP-HCSLIN_0EnabledOE_GROUP_4Disabled
OUT6100100 Ω LP-HCSLIN_0EnabledOE_GROUP_4Disabled
OUT7100100 Ω LP-HCSLIN_0EnabledOE_GROUP_5Disabled

OTP Page 1

Table 1-7 LMK3H2108A11 GPI Settings, OTP Page 1
GPI PinPin BehaviorPolarityInternal Pull-DownInternal Pull-Up
GPI0GPINormalDisabledDisabled
GPI1GPINormalDisabledDisabled
GPI2GPINormalEnabledDisabled
GPI3GPINormalEnabledDisabled
GPI4Group OE, OE_GROUP_4InvertedDisabledEnabled
GPI5Group OE, OE_GROUP_5InvertedDisabledEnabled
Table 1-8 LMK3H2108A11 GPIO Settings, OTP Page 1
GPIO PinPin BehaviorPolarityInternal Pull-DownInternal Pull-Up
GPIO0Dynamic OTPNormalEnabledDisabled
GPIO1Dynamic OTPNormalEnabledDisabled
GPIO2I2C Bit 0NormalEnabledDisabled
GPIO3I2C Bit 1NormalEnabledDisabled
GPIO4GPINormalDisabledEnabled
Table 1-9 LMK3H2108A11 Input Settings, OTP Page 1
InputPowered Up/DownInput FormatInput Termination
IN_0Powered DownDifferential IN0100 Ω P to N
IN_1Powered DownN/A (IN1 Unused)None, DC
IN_2Powered DownN/A (IN2 Unused)None, DC
Table 1-10 LMK3H2108A11 Output Settings, OTP Page 1
OutputFrequency (MHz)FormatClock SourceOutput StateOE GroupSSC Behavior
OUT0100100 Ω LP-HCSLPATH1EnabledOE_GROUP_5Disabled
OUT1100100 Ω LP-HCSLPATH1EnabledOE_GROUP_4Disabled
OUT2100100 Ω LP-HCSLPATH1EnabledOE_GROUP_4Disabled
OUT3100100 Ω LP-HCSLPATH1EnabledOE_GROUP_4Disabled
OUT4100100 Ω LP-HCSLPATH1EnabledOE_GROUP_4Disabled
OUT5100100 Ω LP-HCSLPATH1EnabledOE_GROUP_4Disabled
OUT6100100 Ω LP-HCSLPATH1EnabledOE_GROUP_4Disabled
OUT7100100 Ω LP-HCSLPATH1EnabledOE_GROUP_5Disabled

OTP Page 2

Table 1-11 LMK3H2108A11 GPI Settings, OTP Page 2
GPI PinPin BehaviorPolarityInternal Pull-DownInternal Pull-Up
GPI0GPINormalDisabledDisabled
GPI1GPINormalDisabledDisabled
GPI2GPINormalEnabledDisabled
GPI3GPINormalEnabledDisabled
GPI4Group OE, OE_GROUP_4InvertedDisabledEnabled
GPI5Group OE, OE_GROUP_5InvertedDisabledEnabled
Table 1-12 LMK3H2108A11 GPIO Settings, OTP Page 2
GPIO PinPin BehaviorPolarityInternal Pull-DownInternal Pull-Up
GPIO0Dynamic OTPNormalEnabledDisabled
GPIO1Dynamic OTPNormalEnabledDisabled
GPIO2I2C Bit 0NormalEnabledDisabled
GPIO3I2C Bit 1NormalEnabledDisabled
GPIO4GPINormalDisabledEnabled
Table 1-13 LMK3H2108A11 Input Settings, OTP Page 2
InputPowered Up/DownInput FormatInput Termination
IN_0Powered DownDifferential IN0100 Ω P to N
IN_1Powered DownN/A (IN1 Unused)None, DC
IN_2Powered DownN/A (IN2 Unused)None, DC
Table 1-14 LMK3H2108A11 Output Settings, OTP Page 2
OutputFrequency (MHz)FormatClock SourceOutput StateOE GroupSSC Behavior
OUT0100100 Ω LP-HCSLPATH1EnabledOE_GROUP_5Enabled, -0.199% Down-spread
OUT1100100 Ω LP-HCSLPATH1EnabledOE_GROUP_4Enabled, -0.199% Down-spread
OUT2100100 Ω LP-HCSLPATH1EnabledOE_GROUP_4Enabled, -0.199% Down-spread
OUT3100100 Ω LP-HCSLPATH1EnabledOE_GROUP_4Enabled, -0.199% Down-spread
OUT4100100 Ω LP-HCSLPATH1EnabledOE_GROUP_4Enabled, -0.199% Down-spread
OUT5100100 Ω LP-HCSLPATH1EnabledOE_GROUP_4Enabled, -0.199% Down-spread
OUT6100100 Ω LP-HCSLPATH1EnabledOE_GROUP_4Enabled, -0.199% Down-spread
OUT7100100 Ω LP-HCSLPATH1EnabledOE_GROUP_5Enabled, -0.199% Down-spread

OTP Page 3

Table 1-15 LMK3H2108A11 GPI Settings, OTP Page 3
GPI PinPin BehaviorPolarityInternal Pull-DownInternal Pull-Up
GPI0GPINormalDisabledDisabled
GPI1GPINormalDisabledDisabled
GPI2GPINormalEnabledDisabled
GPI3GPINormalEnabledDisabled
GPI4Group OE, OE_GROUP_4InvertedDisabledEnabled
GPI5Group OE, OE_GROUP_5InvertedDisabledEnabled
Table 1-16 LMK3H2108A11 GPIO Settings, OTP Page 3
GPIO PinPin BehaviorPolarityInternal Pull-DownInternal Pull-Up
GPIO0Dynamic OTPNormalEnabledDisabled
GPIO1Dynamic OTPNormalEnabledDisabled
GPIO2I2C Bit 0NormalEnabledDisabled
GPIO3I2C Bit 1NormalEnabledDisabled
GPIO4GPINormalDisabledEnabled
Table 1-17 LMK3H2108A11 Input Settings, OTP Page 3
InputPowered Up/DownInput FormatInput Termination
IN_0Powered DownDifferential IN0100 Ω P to N
IN_1Powered DownN/A (IN1 Unused)None, DC
IN_2Powered DownN/A (IN2 Unused)None, DC
Table 1-18 LMK3H2108A11 Output Settings, OTP Page 3
OutputFrequency (MHz)FormatClock SourceOutput StateOE GroupSSC Behavior
OUT0100100 Ω LP-HCSLPATH1EnabledOE_GROUP_5Enabled, -0.3% Down-spread
OUT1100100 Ω LP-HCSLPATH1EnabledOE_GROUP_4Enabled, -0.3% Down-spread
OUT2100100 Ω LP-HCSLPATH1EnabledOE_GROUP_4Enabled, -0.3% Down-spread
OUT3100100 Ω LP-HCSLPATH1EnabledOE_GROUP_4Enabled, -0.3% Down-spread
OUT4100100 Ω LP-HCSLPATH1EnabledOE_GROUP_4Enabled, -0.3% Down-spread
OUT5100100 Ω LP-HCSLPATH1EnabledOE_GROUP_4Enabled, -0.3% Down-spread
OUT6100100 Ω LP-HCSLPATH1EnabledOE_GROUP_4Enabled, -0.3% Down-spread
OUT7100100 Ω LP-HCSLPATH1EnabledOE_GROUP_5Enabled, -0.3% Down-spread