Fine Tuning EMI without Sacrificing Efficiency with Smart Gate Drive

EMI is a prevalent issue in electronic systems that can lead to various problems, including data corruption, malfunctions, and damages. For these reasons, it is crucial to strike a balance between EMI and efficiency, particularly in critical equipment such as Electric Power Steering (EPS) and brake systems. Several factors can contribute to EMI, such as the switching of high-speed signals, the usage of large currents, and the presence of stray inductance and capacitance.

One specific cause of EMI is ringing, which can be notably observed on the switch-node waveform as shown in Figure 2. Ringing refers to the oscillation of resonances that occur after a fast transition in voltage or current, often caused by parasitic capacitance and inductance in the circuit. These oscillations can lead to unwanted noise and interference, potentially affecting the performance and reliability of the electronic systems. Possible methods to reduce these effects include optimizing components placement, minimizing PCB parasitic, isolating high-speed traces, and proper grounding.

Figure 1 Reduced Ringing Through IDRIVE Tuning

Figure 2 Ringing on Switch-Node Waveform

Slew rate tuning is a technique used to control the rate at which the voltage across a MOSFET changes, which effects the severity of the switch node oscillations. This can be done by adjusting the gate drive current, which determines the rate at which charge is injected into the gate of the MOSFET. Smart Gate Drive is a technology by Texas Instruments that offers integrated slew rate tuning along with other features that can be used to optimize MOSFET switching. The effects of an optimized design using slew rate tuning can be seen in Figure 1.

Smart Gate Drive simplifies motor driver design by integrating multi-level gate current the ability to adjust controlling the switching of external MOSFETs. The adjustable gate pull up or pull down current enables users to fine-tune the rate at which the MOSFETs switch on or off, controlling the slew rate of the motor switch node. This process can eliminate up to 24 external components by removing the need for external series gate resistors while allowing many combinations to be tried without a hardware rework. This leads to a streamlined design process, cost reduction, and optimization of the motor driver’s switching loss and EMI performance.

This cost-saving architecture is shown in Figure 3. A new market-leading device with this feature is the DRV3233-Q1. DRV3233-Q1 offers 45 different gate current levels with 36 of those levels ranging from 0.5 mA to 250 mA. Smaller MOSFETs require finer current control to tune their slew rate, so having more steps on the lower current ranges can help effectively and quickly tune the MOSFET switching to improve EMI without having to constantly switch out external gate resistors.

Figure 3 Smart Gate Drive Architecture

The DRV3233-Q1 features a fast pre-discharge feature, which can minimize deadtime without compromising the tuned EMI performance. The device also has an automatic strong pull down current to minimize the gate voltage coupling when the complementary side of the half-bridge switches on. These features help engineers find and implement the best balance between EMI and efficiency for their system. Other features of the DRV3233 include an ultra-small package option (6x4 mm 32-pin QFN), high-accuracy CSA with low input offset drift (<0.1 mV across temperature), ±2 V common mode range, and a wide operating range capable of supporting both 12 V and 24 V battery systems (4.5 V to 60 V operation) at Grade 0 (-40 to 150 C ambient) temperature conditions.