SLVAFU9 January   2025 TPS62840 , TPS62843

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Inverting Buck-Boost Topology
    1. 1.1 Concept
    2. 1.2 Output Current Calculations
    3. 1.3 VIN and VOUT Range
  5. 2Design Considerations
    1. 2.1 Additional Input Capacitor
    2. 2.2 Digital Input Pin Configurations
    3. 2.3 Startup Behavior and Switching Node Consideration
  6. 3External Component Selection
    1. 3.1 Inductor Selection
    2. 3.2 Capacitor Selection
  7. 4Typical Performance
  8. 5Summary
  9. 6References

Additional Input Capacitor

An additional input capacitor, CBYP, is required for stability as a bypass capacitor for the device. This capacitor is in addition to the input capacitor, CIN, from VIN to ground (refer to Figure 1-2). The recommended minimum value for the bypass capacitor and the input capacitor is 4.7μF. As a side effect, the CBYP capacitor provides an AC path from VIN to VOUT and together with COUT a capacitive voltage divider is build against GND. In the moment when VIN is applied to the circuit, the capacitive voltage divider is pulling up VOUT above GND, which is causing a positive prebias of the negative rail. This also means the IC GND pin (connected to VOUT) is also prebiased positive, which is pulling SW pin and VOS pin more than 0.3V below IC ground, violating the absolute maximum rating. Such a condition can damage the device and is not recommended. Therefore, a Schottky diode (D1) has to be installed on the output, per Figure 2-1. Startup testing needs to be conducted to verify that the VOS pin is not driven more than 0.3V below IC ground when VIN is applied.

 Inverting Buck-Boost Topology With Schottky DiodeFigure 2-1 Inverting Buck-Boost Topology With Schottky Diode

The AC path through CBYP can also worsen the line transient response. If strong line transients are expected, the output capacitance can be increased to keep the output voltage within acceptable levels during the line transient.

The TPS6284x can operate without the bypass capacitor and without Schottky diode, but care must be taken to verify stability in the individual application and to check that the SW and VOS pin signals do not violate the recommended operating conditions during startup.