SNAA360 June   2022 ADC32RF54 , ADC32RF55 , AFE7950 , LMX1204

 

  1.   Abstract
  2.   Trademarks
  3. 1Introduction
    1. 1.1 Cascaded LMX1204 Design
  4. 2Results
    1. 2.1 Single Device Performance
    2. 2.2 Cascaded Device Performance
    3. 2.3 Detailed Results
      1. 2.3.1 1 GHz Performance
      2. 2.3.2 3 GHz Performance
      3. 2.3.3 6 GHz Performance
      4. 2.3.4 10 GHz Performance
      5. 2.3.5 12.8 GHz Performance
    4. 2.4 Cascaded LMX1204 Performance With ADC32RF54
    5. 2.5 Cascaded LMX1204 Performance With AFE7950
  5. 3Summary
  6. 4References

2.4 Cascaded LMX1204 Performance With ADC32RF54

Figure 2-8 compares the difference in SNR (signal-to-noise ratio) using the ADC32RF54EVM evaluation module clocked by the SMA100B and the cascaded LMX1204 design.

Figure 2-8 ADC32RF54 - SNR vs. Clock Source vs. Frequency

Figure 2-8 above shows SNR in dBFS (decibel relative to full-scale ADC level) at numerous frequencies within the range of 100 MHz to 2 GHz. Each of the input frequencies above is filtered using a narrow bandpass filter to reduce the impact of higher frequency noise and harmonics throughout the capture. The sample rate is a constant 2.6 GSPS and the SMA100B is set such that the output power matches the measured output power level from the cascaded LMX1204 (6.17 dBm). On average, the SNR is degraded by a mere 0.15 dB.