SNAU259 August   2021 LMK1D1208

 

  1.   Trademarks
  2. 1 Features
  3. 2 General Description
  4. 3 Signal Path and Control Circuitry
  5. 4 Getting Started
  6. 5 Power Supply Connection
  7. 6 Input Clock Selection
    1. 6.1 Differential Input
    2. 6.2 Configuring Single-Ended Input
  8. 7 Output Clock
  9. 8 EVM Board Schematic
  10. 9 REACH Compliance
  11. 10Bill of Materials

2 General Description

The LMK1D1208 is a high-performance, low-additive jitter clock buffer. This has two universal input buffers that support differential clock inputs which can be selected by the control pin. The device also features on-chip bias generators that can provide LVDS common-mode voltage for AC-coupled differential clock inputs.

The evaluation module (EVM) is designed to demonstrate the electrical performance of the LMK1D1208. This fully assembled and factory-tested evaluation board allows complete validation of device functionalities. For optimum performance, the board is equipped with SMA connectors and well-controlled, 50-Ω impedance microstrip transmission lines.