SNLA473 November   2024 DP83867CS , DP83867E , DP83867IS , DP83869HM , DP83TC811S-Q1 , DP83TC812S-Q1 , DP83TC813S-Q1 , DP83TC814S-Q1 , DP83TC817S-Q1 , DP83TC818S-Q1 , DP83TG720S-Q1 , DP83TG721S-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Troubleshooting the MAC Interface - SGMII
    1. 1.1 Verify Bootstrap Configurations
      1. 1.1.1 SGMII Bootstrap Configuration for DP83TG720S-Q1
    2. 1.2 Read and Check Register Values
    3. 1.3 Auto-Negotiation
    4. 1.4 Throughput and Loopback Testing
      1. 1.4.1 Bidirectional Throughput Testing
      2. 1.4.2 RX and TX Throughput Testing
      3. 1.4.3 RX and TX Throughput Testing with Fixed Number of Packets
      4. 1.4.4 Loopback Testing
        1. 1.4.4.1 MII Loopback
        2. 1.4.4.2 Reverse Loopback
    5. 1.5 Check the Clock Signal
    6. 1.6 Measure the SGMII Eye
      1. 1.6.1 SGMII Eye Mask Requirements
    7. 1.7 SGMII Layout
  5. 2Summary
  6. 3References

Check the Clock Signal

Using a clock source that fails to meet the PPM specifications mentioned in the data sheet results in issues with register access, packet loss, link down, or complete in-operation of a PHY.

Reach out to the clock source vendor for a crystal report and measure the PPM directly to confirm the clock source being used meets the correct PPM specifications.

To measure the PPM of the clock source, measure the average frequency of the CLK_OUT pin of the PHY with a signal analyzer.

Note: Do not probe XI/XO pins directly to measure the PPM because these pins are more sensitive and can be affected by the capacitance of the probes.

If the average frequency measured by the signal analyzer is f avg, the PPM can be calculated with the following equation:

Equation 1. [(fexpected - f avg) / fexpected ] × 106

For instance, if the requirement is 25MHz±100ppm, the average frequency must be in the range of 24.997500MHz - 25.002500MHz.