SNLA473 November 2024 DP83867CS , DP83867E , DP83867IS , DP83869HM , DP83TC811S-Q1 , DP83TC812S-Q1 , DP83TC813S-Q1 , DP83TC814S-Q1 , DP83TC817S-Q1 , DP83TC818S-Q1 , DP83TG720S-Q1 , DP83TG721S-Q1
Using a clock source that fails to meet the PPM specifications mentioned in the data sheet results in issues with register access, packet loss, link down, or complete in-operation of a PHY.
Reach out to the clock source vendor for a crystal report and measure the PPM directly to confirm the clock source being used meets the correct PPM specifications.
To measure the PPM of the clock source, measure the average frequency of the CLK_OUT pin of the PHY with a signal analyzer.
If the average frequency measured by the signal analyzer is f avg, the PPM can be calculated with the following equation:
For instance, if the requirement is 25MHz±100ppm, the average frequency must be in the range of 24.997500MHz - 25.002500MHz.