SNOU196 may   2023 LM74703-Q1 , LM74704-Q1

 

  1.   1
  2.   Description
  3.   Features
  4.   Applications
  5.   5
  6. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  7. 2Hardware
    1. 2.1 Setup
      1. 2.1.1 I/O Connectors, Jumper and Test Points Description
      2. 2.1.2 Board Setup
    2. 2.2 Operation
      1. 2.2.1 Startup
      2. 2.2.2 FET Status Detection Test
  8. 3Hardware Design Files
    1. 3.1 Schematic
    2. 3.2 PCB Drawings
    3. 3.3 Bill of Materials
  9. 4Additional Information
    1.     Trademarks

FET Status Detection Test

To capture the device FET_GOOD pin behavior while starting up with the external FET short:

  1. Connect a wire between TP1 and TP2 to emaulate the FET short behavior.
  2. Set the input supply voltage VIN to 12 V and current limit of 5 A.
  3. While testing with LM74704-Q1, verify the jumper J5 is populated which connects the on board generated pull-up voltage to FET_GOOD signal.
    1. For testing with external pull-up voltage, de-populate J5 jumper and apply external pull-up voltage to TP3 (FET_GOOD).
  4. While testing with LM74703-Q1, verify the jumper J5 is de-populated as the LM74703-Q1 has push-pull output of FET_GOOD and does not require an external pull-up voltage.
  5. Turn ON the power supply.
  6. Observe the start-up profile of VIN, VOUT, GATE and FET_GOOD.

Figure 3-4 shows startup with FET short behavior of LM74704-Q1.

GUID-20230511-SS0I-QWDX-VTTV-WWXGMVXBJX3G-low.png Figure 2-4 FET_GOOD During Startup with FET Short (LM74704-Q1) with External Pull-Up Voltage

Figure 3-5 shows startup with FET short behavior of LM74703-Q1.

GUID-20230511-SS0I-XDGM-6ZDG-V9MQ8JXMG6MF-low.png Figure 2-5 FETGOOD During Startup with FET Short (LM74703-Q1)