SNVA869 November   2020 LP875761-Q1

 

  1.   Trademarks
  2. 1Design Parameters
  3. 2Power Solution
  4. 3Schematic
  5. 4Layout
    1. 4.1 Layout Considerations
    2. 4.2 Example Layout
  6. 5Recommended External Components
  7. 6Measurements
  8. 7Conclusion
  9. 8References

1 Design Parameters

Design target parameters for the EyeQ4 High core rail power is show in Table 1-1 and typical measurement data is seen in Section 6.

Table 1-1 Design Parameters
DESIGN PARAMETERVALUE
VIN3.3 V / 5 V (±5%)
VOUT1 V
IOUT12 A max (LP875761A-Q1 supports up to 16 A load current)
VOUT tolerance±3% in all conditions including DC accuracy and load transient
Load transient8 A/µs, 4 A to 12 A to 4 A
CIN(nom)At least 10 µF capacitor per phase
COUT(nom)144 µF total capacitance per phase, including point of load capacitors
COUT(min)100 µF total capacitance per phase, including point of load capacitors
COUT(max)1500 µF total, all phases combined, including point of load capacitors
L (nom)330 nH, at least 3.5 A saturation current
Phase margin>45°
Gain margin>10 dB