SPMU391 November   2025 LMK3H2108

 

  1.   1
  2.   Read This First
    1.     About This Manual
    2.     Notational Conventions
    3.     Glossary
    4.     Related Documentation
    5.     Support Resources
    6.     Trademarks
  3. 1Configuration Overview
    1. 1.1 LMK3H2108A0F Configuration Information
  4. 2Device Register Map
  5. 3Device Registers
  6. 4Revision History

LMK3H2108A0F Configuration Information

Table 1-1 LMK3H2108A0F Frequency Configuration
OTP PageOUT0 (MHz)OUT1 (MHz)OUT2 (MHz)OUT3 (MHz)OUT4 (MHz)OUT5 (MHz)OUT6 (MHz)OUT7 (MHz)
OTP Page 01002525100100156.25156.25156.25
OTP Page 11002525100100156.25156.25156.25
OTP Page 21002525100100156.25156.25156.25
OTP Page 31002525100100156.25156.25156.25
Table 1-2 LMK3H2108A0F I2C Configuration
OTP PageI2C Configuration
OTP Page 0

I2C Address: 0x3e

1 Byte Register Addressing

OTP Page 1

I2C Address: 0x3e

1 Byte Register Addressing

OTP Page 2

I2C Address: 0x3e

1 Byte Register Addressing

OTP Page 3

I2C Address: 0x3e

1 Byte Register Addressing

OTP Page 0

Table 1-3 LMK3H2108A0F GPI Settings, OTP Page 0
GPI PinPin BehaviorPolarityInternal Pull-DownInternal Pull-Up
GPI0GPIInvertedEnabledDisabled
GPI1GPIInvertedEnabledDisabled
GPI2GPIInvertedEnabledDisabled
GPI3GPIInvertedEnabledDisabled
GPI4GPIInvertedEnabledDisabled
GPI5GPIInvertedEnabledDisabled
Table 1-4 LMK3H2108A0F GPIO Settings, OTP Page 0
GPIO PinPin BehaviorPolarityInternal Pull-DownInternal Pull-Up
GPIO0GPIInvertedEnabledDisabled
GPIO1Global OEInvertedEnabledDisabled
GPIO2GPIInvertedEnabledDisabled
GPIO3GPIInvertedEnabledDisabled
GPIO4GPIInvertedEnabledDisabled
Table 1-5 LMK3H2108A0F Input Settings, OTP Page 0
InputPowered Up/DownInput FormatInput Termination
IN_0Powered DownN/A (IN0 Unused)None, DC
IN_1Powered DownN/A (IN1 Unused)None, DC
IN_2Powered DownN/A (IN2 Unused)None, DC
Table 1-6 LMK3H2108A0F Output Settings, OTP Page 0
OutputFrequency (MHz)FormatClock SourceOutput StateOE GroupSSC Behavior
OUT0100100 Ω LP-HCSLPATH1EnabledGlobal OE OnlyDisabled
OUT125Diff LVCMOSPATH1EnabledGlobal OE OnlyDisabled
OUT225Diff LVCMOSPATH1EnabledGlobal OE OnlyDisabled
OUT3100100 Ω LP-HCSLPATH1EnabledGlobal OE OnlyDisabled
OUT4100100 Ω LP-HCSLPATH1EnabledGlobal OE OnlyDisabled
OUT5156.25100 Ω LP-HCSLPATH0DisabledGlobal OE OnlyDisabled
OUT6156.25DC-LVDSPATH0EnabledGlobal OE OnlyDisabled
OUT7156.25DC-LVDSPATH0EnabledGlobal OE OnlyDisabled

OTP Page 1

Table 1-7 LMK3H2108A0F GPI Settings, OTP Page 1
GPI PinPin BehaviorPolarityInternal Pull-DownInternal Pull-Up
GPI0GPIInvertedEnabledDisabled
GPI1GPIInvertedEnabledDisabled
GPI2GPIInvertedEnabledDisabled
GPI3GPIInvertedEnabledDisabled
GPI4GPIInvertedEnabledDisabled
GPI5GPIInvertedEnabledDisabled
Table 1-8 LMK3H2108A0F GPIO Settings, OTP Page 1
GPIO PinPin BehaviorPolarityInternal Pull-DownInternal Pull-Up
GPIO0GPIInvertedEnabledDisabled
GPIO1Global OEInvertedEnabledDisabled
GPIO2GPIInvertedEnabledDisabled
GPIO3GPIInvertedEnabledDisabled
GPIO4GPIInvertedEnabledDisabled
Table 1-9 LMK3H2108A0F Input Settings, OTP Page 1
InputPowered Up/DownInput FormatInput Termination
IN_0Powered DownN/A (IN0 Unused)None, DC
IN_1Powered DownN/A (IN1 Unused)None, DC
IN_2Powered DownN/A (IN2 Unused)None, DC
Table 1-10 LMK3H2108A0F Output Settings, OTP Page 1
OutputFrequency (MHz)FormatClock SourceOutput StateOE GroupSSC Behavior
OUT0100100 Ω LP-HCSLPATH1EnabledGlobal OE OnlyDisabled
OUT125Diff LVCMOSPATH1EnabledGlobal OE OnlyDisabled
OUT225Diff LVCMOSPATH1EnabledGlobal OE OnlyDisabled
OUT3100100 Ω LP-HCSLPATH1EnabledGlobal OE OnlyDisabled
OUT4100100 Ω LP-HCSLPATH1EnabledGlobal OE OnlyDisabled
OUT5156.25100 Ω LP-HCSLPATH0DisabledGlobal OE OnlyDisabled
OUT6156.25DC-LVDSPATH0EnabledGlobal OE OnlyDisabled
OUT7156.25DC-LVDSPATH0EnabledGlobal OE OnlyDisabled

OTP Page 2

Table 1-11 LMK3H2108A0F GPI Settings, OTP Page 2
GPI PinPin BehaviorPolarityInternal Pull-DownInternal Pull-Up
GPI0GPIInvertedEnabledDisabled
GPI1GPIInvertedEnabledDisabled
GPI2GPIInvertedEnabledDisabled
GPI3GPIInvertedEnabledDisabled
GPI4GPIInvertedEnabledDisabled
GPI5GPIInvertedEnabledDisabled
Table 1-12 LMK3H2108A0F GPIO Settings, OTP Page 2
GPIO PinPin BehaviorPolarityInternal Pull-DownInternal Pull-Up
GPIO0GPIInvertedEnabledDisabled
GPIO1Global OEInvertedEnabledDisabled
GPIO2GPIInvertedEnabledDisabled
GPIO3GPIInvertedEnabledDisabled
GPIO4GPIInvertedEnabledDisabled
Table 1-13 LMK3H2108A0F Input Settings, OTP Page 2
InputPowered Up/DownInput FormatInput Termination
IN_0Powered DownN/A (IN0 Unused)None, DC
IN_1Powered DownN/A (IN1 Unused)None, DC
IN_2Powered DownN/A (IN2 Unused)None, DC
Table 1-14 LMK3H2108A0F Output Settings, OTP Page 2
OutputFrequency (MHz)FormatClock SourceOutput StateOE GroupSSC Behavior
OUT0100100 Ω LP-HCSLPATH1EnabledGlobal OE OnlyDisabled
OUT125Diff LVCMOSPATH1EnabledGlobal OE OnlyDisabled
OUT225Diff LVCMOSPATH1EnabledGlobal OE OnlyDisabled
OUT3100100 Ω LP-HCSLPATH1EnabledGlobal OE OnlyDisabled
OUT4100100 Ω LP-HCSLPATH1EnabledGlobal OE OnlyDisabled
OUT5156.25100 Ω LP-HCSLPATH0DisabledGlobal OE OnlyDisabled
OUT6156.25DC-LVDSPATH0EnabledGlobal OE OnlyDisabled
OUT7156.25DC-LVDSPATH0EnabledGlobal OE OnlyDisabled

OTP Page 3

Table 1-15 LMK3H2108A0F GPI Settings, OTP Page 3
GPI PinPin BehaviorPolarityInternal Pull-DownInternal Pull-Up
GPI0GPIInvertedEnabledDisabled
GPI1GPIInvertedEnabledDisabled
GPI2GPIInvertedEnabledDisabled
GPI3GPIInvertedEnabledDisabled
GPI4GPIInvertedEnabledDisabled
GPI5GPIInvertedEnabledDisabled
Table 1-16 LMK3H2108A0F GPIO Settings, OTP Page 3
GPIO PinPin BehaviorPolarityInternal Pull-DownInternal Pull-Up
GPIO0GPIInvertedEnabledDisabled
GPIO1Global OEInvertedEnabledDisabled
GPIO2GPIInvertedEnabledDisabled
GPIO3GPIInvertedEnabledDisabled
GPIO4GPIInvertedEnabledDisabled
Table 1-17 LMK3H2108A0F Input Settings, OTP Page 3
InputPowered Up/DownInput FormatInput Termination
IN_0Powered DownN/A (IN0 Unused)None, DC
IN_1Powered DownN/A (IN1 Unused)None, DC
IN_2Powered DownN/A (IN2 Unused)None, DC
Table 1-18 LMK3H2108A0F Output Settings, OTP Page 3
OutputFrequency (MHz)FormatClock SourceOutput StateOE GroupSSC Behavior
OUT0100100 Ω LP-HCSLPATH1EnabledGlobal OE OnlyDisabled
OUT125Diff LVCMOSPATH1EnabledGlobal OE OnlyDisabled
OUT225Diff LVCMOSPATH1EnabledGlobal OE OnlyDisabled
OUT3100100 Ω LP-HCSLPATH1EnabledGlobal OE OnlyDisabled
OUT4100100 Ω LP-HCSLPATH1EnabledGlobal OE OnlyDisabled
OUT5156.25100 Ω LP-HCSLPATH0DisabledGlobal OE OnlyDisabled
OUT6156.25DC-LVDSPATH0EnabledGlobal OE OnlyDisabled
OUT7156.25DC-LVDSPATH0EnabledGlobal OE OnlyDisabled