1 Device Information

The TMS570LC4357-SEP is a high-performance Arm® Cortex® R-based microcontroller that features on-chip diagnostic features, including dual CPUs in lockstep, Built-In Self-Test (BIST) logic for CPU, the N2HET coprocessors, and for on-chip SRAMs, as well as ECC protection on the L1 caches, L2 flash, and SRAM memories. The device supports ECC or parity protection on peripheral memories and loopback capability on peripheral I/Os.

The TMS570LC4357 device features 4MB of integrated flash and 512KB of data RAM with single-bit error and double-bit error detection. The flash memory on this device is a nonvolatile, electrically erasable, and programmable memory implemented with a 64-bit-wide data bus interface. The flash operates on a 3.3V supply input (the same level as the I/O supply) for all read, program, and erase operations. The SRAM supports read and write accesses in byte, halfword, and word modes.

The device integrates two ARM Cortex-R5F floating-point CPUs, operating in lockstep, which offer 1.66 DMIPS/MHz and can run up to 300MHz, providing up to 498DMIPS. The device supports the big-endian (BE32) format.

With integrated safety features and a wide choice of communication and control peripherals, the TMS570LC4357-SEP device is designed for high-performance real-time control applications with safety-critical requirements.

For more information, see the product page.