TMS570LC4357

ACTIVE

16/32 Bit RISC Flash MCU, Arm Cortex-R5F, EMAC, FlexRay, Auto Q-100

TMS570LC4357

ACTIVE

Product details

Frequency (MHz) 300 Flash memory (kByte) 4096 RAM (kByte) 512 ADC type 2 x 12-bit (41ch) Number of GPIOs 168 UART 4 Features Hercules high-performance microcontroller TI functional safety category Functional Safety-Compliant Operating temperature range (°C) -40 to 125 Ethernet Yes PWM (Ch) 78 CAN (#) 4 Power supply solution TPS65381A-Q1 Communication interface CAN, Ethernet, FlexRay, SPI, UART
Frequency (MHz) 300 Flash memory (kByte) 4096 RAM (kByte) 512 ADC type 2 x 12-bit (41ch) Number of GPIOs 168 UART 4 Features Hercules high-performance microcontroller TI functional safety category Functional Safety-Compliant Operating temperature range (°C) -40 to 125 Ethernet Yes PWM (Ch) 78 CAN (#) 4 Power supply solution TPS65381A-Q1 Communication interface CAN, Ethernet, FlexRay, SPI, UART
NFBGA (ZWT) 337 256 mm² 16 x 16
  • High-Performance Automotive-Grade Microcontroller for Safety-Critical Applications
    • Dual-Core Lockstep CPUs With ECC-Protected Caches
    • ECC on Flash and RAM Interfaces
    • Built-In Self-Test (BIST) for CPU, High-End Timers, and On-Chip RAMs
    • Error Signaling Module (ESM) With Error Pin
    • Voltage and Clock Monitoring
  • ARM Cortex - R5F 32-Bit RISC CPU
    • 1.66 DMIPS/MHz With 8-Stage Pipeline
    • FPU With Single- and Double-Precision
    • 16-Region Memory Protection Unit (MPU)
    • 32KB of Instruction and 32KB of Data Caches With ECC
    • Open Architecture With Third-Party Support
  • Operating Conditions
    • Up to 300-MHz CPU Clock
    • Core Supply Voltage (VCC): 1.14 to 1.32 V
    • I/O Supply Voltage (VCCIO): 3.0 to 3.6 V
  • Integrated Memory
    • 4MB of Program Flash With ECC
    • 512KB of RAM With ECC
    • 128KB of Data Flash for Emulated EEPROM With ECC
  • 16-Bit External Memory Interface (EMIF)
  • Hercules Common Platform Architecture
    • Consistent Memory Map Across Family
    • Real-Time Interrupt (RTI) Timer (OS Timer)
    • Two 128-Channel Vectored Interrupt Modules (VIMs) With ECC Protection on Vector Table
      • VIM1 and VIM2 in Safety Lockstep Mode
    • Two 2-Channel Cyclic Redundancy Checker (CRC) Modules
  • Direct Memory Access (DMA) Controller
    • 32 Channels and 48 Peripheral Requests
    • ECC Protection for Control Packet RAM
    • DMA Accesses Protected by Dedicated MPU
  • Frequency-Modulated Phase-Locked Loop (FMPLL) With Built-In Slip Detector
  • Separate Nonmodulating PLL
  • IEEE 1149.1 JTAG, Boundary Scan, and ARM CoreSight Components
  • Advanced JTAG Security Module (AJSM) 
  • Trace and Calibration Capabilities
    • ETM, RTP, DMM, POM
  • Multiple Communication Interfaces
    • 10/100 Mbps Ethernet MAC (EMAC)
      • IEEE 802.3 Compliant (3.3-V I/O Only)
      • Supports MII, RMII, and MDIO
    • FlexRay Controller With 2 Channels
      • 8KB of Message RAM With ECC Protection
      • Dedicated FlexRay Transfer Unit (FTU)
    • Four CAN Controller (DCAN) Modules
      • 64 Mailboxes, Each With ECC Protection
      • Compliant to CAN Protocol Version 2.0B
    • Two Inter-Integrated Circuit (I2C) Modules
    • Five Multibuffered Serial Peripheral Interface (MibSPI) Modules
      • MibSPI1: 256 Words With ECC Protection
      • Other MibSPIs: 128 Words With ECC Protection
    • Four UART (SCI) Interfaces, Two With Local Interconnect Network (LIN 2.1) Interface Support
  • Two Next Generation High-End Timer (N2HET) Modules
    • 32 Programmable Channels Each
    • 256-Word Instruction RAM With Parity
    • Hardware Angle Generator for Each N2HET
    • Dedicated High-End Timer Transfer Unit (HTU) for Each N2HET
  • Two 12-Bit Multibuffered Analog-to-Digital Converter (MibADC) Modules
    • MibADC1: 32 Channels Plus Control for up to 1024 Off-Chip Channels
    • MibADC2: 25 Channels
    • 16 Shared Channels
    • 64 Result Buffers Each With Parity Protection
  • Enhanced Timing Peripherals
    • 7 Enhanced Pulse Width Modulator (ePWM) Modules
    • 6 Enhanced Capture (eCAP) Modules
    • 2 Enhanced Quadrature Encoder Pulse (eQEP) Modules
  • Three On-Die Temperature Sensors
  • Up to 145 Pins Available for General-Purpose I/O (GPIO)
  • 16 Dedicated GPIO Pins With External Interrupt Capability
  • Packages
    • 337-Ball Grid Array (ZWT) [Green]

All trademarks are the property of their respective owners.

  • High-Performance Automotive-Grade Microcontroller for Safety-Critical Applications
    • Dual-Core Lockstep CPUs With ECC-Protected Caches
    • ECC on Flash and RAM Interfaces
    • Built-In Self-Test (BIST) for CPU, High-End Timers, and On-Chip RAMs
    • Error Signaling Module (ESM) With Error Pin
    • Voltage and Clock Monitoring
  • ARM Cortex - R5F 32-Bit RISC CPU
    • 1.66 DMIPS/MHz With 8-Stage Pipeline
    • FPU With Single- and Double-Precision
    • 16-Region Memory Protection Unit (MPU)
    • 32KB of Instruction and 32KB of Data Caches With ECC
    • Open Architecture With Third-Party Support
  • Operating Conditions
    • Up to 300-MHz CPU Clock
    • Core Supply Voltage (VCC): 1.14 to 1.32 V
    • I/O Supply Voltage (VCCIO): 3.0 to 3.6 V
  • Integrated Memory
    • 4MB of Program Flash With ECC
    • 512KB of RAM With ECC
    • 128KB of Data Flash for Emulated EEPROM With ECC
  • 16-Bit External Memory Interface (EMIF)
  • Hercules Common Platform Architecture
    • Consistent Memory Map Across Family
    • Real-Time Interrupt (RTI) Timer (OS Timer)
    • Two 128-Channel Vectored Interrupt Modules (VIMs) With ECC Protection on Vector Table
      • VIM1 and VIM2 in Safety Lockstep Mode
    • Two 2-Channel Cyclic Redundancy Checker (CRC) Modules
  • Direct Memory Access (DMA) Controller
    • 32 Channels and 48 Peripheral Requests
    • ECC Protection for Control Packet RAM
    • DMA Accesses Protected by Dedicated MPU
  • Frequency-Modulated Phase-Locked Loop (FMPLL) With Built-In Slip Detector
  • Separate Nonmodulating PLL
  • IEEE 1149.1 JTAG, Boundary Scan, and ARM CoreSight Components
  • Advanced JTAG Security Module (AJSM) 
  • Trace and Calibration Capabilities
    • ETM, RTP, DMM, POM
  • Multiple Communication Interfaces
    • 10/100 Mbps Ethernet MAC (EMAC)
      • IEEE 802.3 Compliant (3.3-V I/O Only)
      • Supports MII, RMII, and MDIO
    • FlexRay Controller With 2 Channels
      • 8KB of Message RAM With ECC Protection
      • Dedicated FlexRay Transfer Unit (FTU)
    • Four CAN Controller (DCAN) Modules
      • 64 Mailboxes, Each With ECC Protection
      • Compliant to CAN Protocol Version 2.0B
    • Two Inter-Integrated Circuit (I2C) Modules
    • Five Multibuffered Serial Peripheral Interface (MibSPI) Modules
      • MibSPI1: 256 Words With ECC Protection
      • Other MibSPIs: 128 Words With ECC Protection
    • Four UART (SCI) Interfaces, Two With Local Interconnect Network (LIN 2.1) Interface Support
  • Two Next Generation High-End Timer (N2HET) Modules
    • 32 Programmable Channels Each
    • 256-Word Instruction RAM With Parity
    • Hardware Angle Generator for Each N2HET
    • Dedicated High-End Timer Transfer Unit (HTU) for Each N2HET
  • Two 12-Bit Multibuffered Analog-to-Digital Converter (MibADC) Modules
    • MibADC1: 32 Channels Plus Control for up to 1024 Off-Chip Channels
    • MibADC2: 25 Channels
    • 16 Shared Channels
    • 64 Result Buffers Each With Parity Protection
  • Enhanced Timing Peripherals
    • 7 Enhanced Pulse Width Modulator (ePWM) Modules
    • 6 Enhanced Capture (eCAP) Modules
    • 2 Enhanced Quadrature Encoder Pulse (eQEP) Modules
  • Three On-Die Temperature Sensors
  • Up to 145 Pins Available for General-Purpose I/O (GPIO)
  • 16 Dedicated GPIO Pins With External Interrupt Capability
  • Packages
    • 337-Ball Grid Array (ZWT) [Green]

All trademarks are the property of their respective owners.

The TMS570LC4357 device is part of the Hercules TMS570 series of high-performance automotive-grade ARM® Cortex®-R-based MCUs. Comprehensive documentation, tools, and software are available to assist in the development of ISO 26262 and IEC 61508 functional safety applications. Start evaluating today with the Hercules TMS570LC43x LaunchPad Development Kit. The TMS570LC4357 device has on-chip diagnostic features including: dual CPUs in lockstep, Built-In Self-Test (BIST) logic for CPU, the N2HET coprocessors, and for on-chip SRAMs; ECC protection on the L1 caches, L2 flash, and SRAM memories. The device also supports ECC or parity protection on peripheral memories and loopback capability on peripheral I/Os.

The TMS570LC4357 device integrates two ARM Cortex-R5F floating-point CPUs, operating in lockstep, which offer an efficient 1.66 DMIPS/MHz, and can run up to 300 MHz providing up to 498 DMIPS. The device supports the big-endian [BE32] format.

The TMS570LC4357 device has 4MB of integrated flash and 512KB of data RAM with single-bit error correction and double-bit error detection. The flash memory on this device is a nonvolatile, electrically erasable and programmable memory, implemented with a 64-bit-wide data bus interface. The flash operates on a 3.3-V supply input (the same level as the I/O supply) for all read, program, and erase operations. The SRAM supports read and write accesses in byte, halfword, and word modes.

The TMS570LC4357 device features peripherals for real-time control-based applications, including two Next Generation High-End Timer (N2HET) timing coprocessors with up to 64 total I/O terminals.

The N2HET is an advanced intelligent timer that provides sophisticated timing functions for real-time applications. The timer is software-controlled, with a specialized timer micromachine and an attached I/O port. The N2HET can be used for pulse-width-modulated outputs, capture or compare inputs, or GPIO. The N2HET is especially well suited for applications requiring multiple sensor information or drive actuators with complex and accurate time pulses. The High-End Timer Transfer Unit (HTU) can perform DMA-type transactions to transfer N2HET data to or from main memory. A Memory Protection Unit (MPU) is built into the HTU.

The Enhanced Pulse Width Modulator (ePWM) module can generate complex pulse width waveforms with minimal CPU overhead or intervention. The ePWM is easy to use and supports both high-side and low-side PWM and deadband generation. With integrated trip zone protection and synchronization with the on-chip MibADC, the ePWM is ideal for digital motor control applications.

The Enhanced Capture (eCAP) module is essential in systems where the accurately timed capture of external events is important. The eCAP can also be used to monitor the ePWM outputs or for simple PWM generation when not needed for capture applications.

The Enhanced Quadrature Encoder Pulse (eQEP) module directly interfaces with a linear or rotary incremental encoder to get position, direction, and speed information from a rotating machine as used in high-performance motion and position-control systems.

The device has two 12-bit-resolution MibADCs with 41 total channels and 64 words of parity-protected buffer RAM. The MibADC channels can be converted individually or by group for special conversion sequences. Sixteen channels are shared between the two MibADCs. Each MibADC supports three separate groupings. Each sequence can be converted once when triggered or configured for continuous conversion mode. The MibADC has a 10-bit mode for use when compatibility with older devices or faster conversion time is desired. One of the channels in MibADC1 and two of the channels in MibADC2 can be used to convert temperature measurements from the three on-chip temperature sensors.

The device has multiple communication interfaces: Five MibSPIs; four UART (SCI) interfaces, two with LIN support; four CANs; two I2C modules;one Ethernet Controller; and one FlexRay controller. The SPI provides a convenient method of serial interaction for high-speed communications between similar shift-register type devices. The LIN supports the Local Interconnect standard (LIN 2.1) and can be used as a UART in full-duplex mode using the standard Non-Return-to-Zero (NRZ) format. The DCAN supports the CAN 2.0B protocol standard and uses a serial, multimaster communication protocol that efficiently supports distributed real-time control with robust communication rates of up to 1 Mbps. The DCAN is ideal for applications operating in noisy and harsh environments (for example, automotive and industrial fields) that require reliable serial communication or multiplexed wiring. The FlexRay controller uses a dual-channel serial, fixed time base multimaster communication protocol with communication rates of 10 Mbps per channel. A FlexRay Transfer Unit (FTU) enables autonomous transfers of FlexRay data to and from main CPU memory. HTU transfers are protected by a dedicated, built-in MPU. The Ethernet module supports MII, RMII, and Management Data I/O (MDIO) interfaces. The I2C module is a multimaster communication module providing an interface between the microcontroller and an I2C-compatible device through the I2C serial bus. The I2C module supports speeds of 100 and 400 kbps.

The Frequency-Modulated Phase-Locked Loop (FMPLL) clock module multiplies the external frequency reference to a higher frequency for internal use. The Global Clock Module (GCM) manages the mapping between the available clock sources and the internal device clock domains.

The device also has two External Clock Prescaler (ECP) modules. When enabled, the ECPs output a continuous external clock on the ECLK1 and ECLK2 balls. The ECLK frequency is a user-programmable ratio of the peripheral interface clock (VCLK) frequency. This low-frequency output can be monitored externally as an indicator of the device operating frequency.

The Direct Memory Access (DMA) controller has 32 channels, 48 peripheral requests, and ECC protection on its memory. An MPU is built into the DMA to protect memory against erroneous transfers.

The Error Signaling Module (ESM) monitors on-chip device errors and determines whether an interrupt or external Error pin/ball (nERROR) is triggered when a fault is detected. The nERROR signal can be monitored externally as an indicator of a fault condition in the microcontroller.

The External Memory Interface (EMIF) provides a memory extension to asynchronous and synchronous memories or other slave devices.

A Parameter Overlay Module (POM) is included to enhance the debugging capabilities of application code. The POM can reroute flash accesses to internal RAM or to the EMIF, thus avoiding the reprogramming steps necessary for parameter updates in flash. This capability is particularly helpful during real-time system calibration cycles.

Several interfaces are implemented to enhance the debugging capabilities of application code. In addition to the built-in ARM Cortex-R5F CoreSight debug features, the Embedded Cross Trigger (ECT) supports the interaction and synchronization of multiple triggering events within the SoC. An External Trace Macrocell (ETM) provides instruction and data trace of program execution. For instrumentation purposes, a RAM Trace Port (RTP) module is implemented to support high-speed tracing of RAM and peripheral accesses by the CPU or any other master. A Data Modification Module (DMM) gives the ability to write external data into the device memory. Both the RTP and DMM have no or minimal impact on the program execution time of the application code.

With integrated safety features and a wide choice of communication and control peripherals, the TMS570LC4357 device is an ideal solution for high-performance real-time control applications with safety-critical

The TMS570LC4357 device is part of the Hercules TMS570 series of high-performance automotive-grade ARM® Cortex®-R-based MCUs. Comprehensive documentation, tools, and software are available to assist in the development of ISO 26262 and IEC 61508 functional safety applications. Start evaluating today with the Hercules TMS570LC43x LaunchPad Development Kit. The TMS570LC4357 device has on-chip diagnostic features including: dual CPUs in lockstep, Built-In Self-Test (BIST) logic for CPU, the N2HET coprocessors, and for on-chip SRAMs; ECC protection on the L1 caches, L2 flash, and SRAM memories. The device also supports ECC or parity protection on peripheral memories and loopback capability on peripheral I/Os.

The TMS570LC4357 device integrates two ARM Cortex-R5F floating-point CPUs, operating in lockstep, which offer an efficient 1.66 DMIPS/MHz, and can run up to 300 MHz providing up to 498 DMIPS. The device supports the big-endian [BE32] format.

The TMS570LC4357 device has 4MB of integrated flash and 512KB of data RAM with single-bit error correction and double-bit error detection. The flash memory on this device is a nonvolatile, electrically erasable and programmable memory, implemented with a 64-bit-wide data bus interface. The flash operates on a 3.3-V supply input (the same level as the I/O supply) for all read, program, and erase operations. The SRAM supports read and write accesses in byte, halfword, and word modes.

The TMS570LC4357 device features peripherals for real-time control-based applications, including two Next Generation High-End Timer (N2HET) timing coprocessors with up to 64 total I/O terminals.

The N2HET is an advanced intelligent timer that provides sophisticated timing functions for real-time applications. The timer is software-controlled, with a specialized timer micromachine and an attached I/O port. The N2HET can be used for pulse-width-modulated outputs, capture or compare inputs, or GPIO. The N2HET is especially well suited for applications requiring multiple sensor information or drive actuators with complex and accurate time pulses. The High-End Timer Transfer Unit (HTU) can perform DMA-type transactions to transfer N2HET data to or from main memory. A Memory Protection Unit (MPU) is built into the HTU.

The Enhanced Pulse Width Modulator (ePWM) module can generate complex pulse width waveforms with minimal CPU overhead or intervention. The ePWM is easy to use and supports both high-side and low-side PWM and deadband generation. With integrated trip zone protection and synchronization with the on-chip MibADC, the ePWM is ideal for digital motor control applications.

The Enhanced Capture (eCAP) module is essential in systems where the accurately timed capture of external events is important. The eCAP can also be used to monitor the ePWM outputs or for simple PWM generation when not needed for capture applications.

The Enhanced Quadrature Encoder Pulse (eQEP) module directly interfaces with a linear or rotary incremental encoder to get position, direction, and speed information from a rotating machine as used in high-performance motion and position-control systems.

The device has two 12-bit-resolution MibADCs with 41 total channels and 64 words of parity-protected buffer RAM. The MibADC channels can be converted individually or by group for special conversion sequences. Sixteen channels are shared between the two MibADCs. Each MibADC supports three separate groupings. Each sequence can be converted once when triggered or configured for continuous conversion mode. The MibADC has a 10-bit mode for use when compatibility with older devices or faster conversion time is desired. One of the channels in MibADC1 and two of the channels in MibADC2 can be used to convert temperature measurements from the three on-chip temperature sensors.

The device has multiple communication interfaces: Five MibSPIs; four UART (SCI) interfaces, two with LIN support; four CANs; two I2C modules;one Ethernet Controller; and one FlexRay controller. The SPI provides a convenient method of serial interaction for high-speed communications between similar shift-register type devices. The LIN supports the Local Interconnect standard (LIN 2.1) and can be used as a UART in full-duplex mode using the standard Non-Return-to-Zero (NRZ) format. The DCAN supports the CAN 2.0B protocol standard and uses a serial, multimaster communication protocol that efficiently supports distributed real-time control with robust communication rates of up to 1 Mbps. The DCAN is ideal for applications operating in noisy and harsh environments (for example, automotive and industrial fields) that require reliable serial communication or multiplexed wiring. The FlexRay controller uses a dual-channel serial, fixed time base multimaster communication protocol with communication rates of 10 Mbps per channel. A FlexRay Transfer Unit (FTU) enables autonomous transfers of FlexRay data to and from main CPU memory. HTU transfers are protected by a dedicated, built-in MPU. The Ethernet module supports MII, RMII, and Management Data I/O (MDIO) interfaces. The I2C module is a multimaster communication module providing an interface between the microcontroller and an I2C-compatible device through the I2C serial bus. The I2C module supports speeds of 100 and 400 kbps.

The Frequency-Modulated Phase-Locked Loop (FMPLL) clock module multiplies the external frequency reference to a higher frequency for internal use. The Global Clock Module (GCM) manages the mapping between the available clock sources and the internal device clock domains.

The device also has two External Clock Prescaler (ECP) modules. When enabled, the ECPs output a continuous external clock on the ECLK1 and ECLK2 balls. The ECLK frequency is a user-programmable ratio of the peripheral interface clock (VCLK) frequency. This low-frequency output can be monitored externally as an indicator of the device operating frequency.

The Direct Memory Access (DMA) controller has 32 channels, 48 peripheral requests, and ECC protection on its memory. An MPU is built into the DMA to protect memory against erroneous transfers.

The Error Signaling Module (ESM) monitors on-chip device errors and determines whether an interrupt or external Error pin/ball (nERROR) is triggered when a fault is detected. The nERROR signal can be monitored externally as an indicator of a fault condition in the microcontroller.

The External Memory Interface (EMIF) provides a memory extension to asynchronous and synchronous memories or other slave devices.

A Parameter Overlay Module (POM) is included to enhance the debugging capabilities of application code. The POM can reroute flash accesses to internal RAM or to the EMIF, thus avoiding the reprogramming steps necessary for parameter updates in flash. This capability is particularly helpful during real-time system calibration cycles.

Several interfaces are implemented to enhance the debugging capabilities of application code. In addition to the built-in ARM Cortex-R5F CoreSight debug features, the Embedded Cross Trigger (ECT) supports the interaction and synchronization of multiple triggering events within the SoC. An External Trace Macrocell (ETM) provides instruction and data trace of program execution. For instrumentation purposes, a RAM Trace Port (RTP) module is implemented to support high-speed tracing of RAM and peripheral accesses by the CPU or any other master. A Data Modification Module (DMM) gives the ability to write external data into the device memory. Both the RTP and DMM have no or minimal impact on the program execution time of the application code.

With integrated safety features and a wide choice of communication and control peripherals, the TMS570LC4357 device is an ideal solution for high-performance real-time control applications with safety-critical

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More information

Hercules TMS570LC4357 is certified by TÜV SÜD to be capable of achieving IEC 61508 SIL 3 helping to make it easier to develop functional safety applications. Download certificate now.

Technical documentation

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Type Title Date
* Data sheet TMS570LC4357 Hercules™ Microcontroller Based on the ARM® Cortex®-R Core datasheet (Rev. C) PDF | HTML 24 Jun 2016
* Errata TMS570LC4x Microcontroller Silicon Errata (Silicon Revision B) (Rev. B) 21 Jun 2018
* Errata TMS570LC4357 Microcontroller Silicon Errata (Silicon Revision A) (Rev. D) 31 May 2016
* User guide TMS570LC43x 16/32 RISC Flash Microcontroller Technical Reference Manual (Rev. A) 01 Mar 2018
Functional safety information Certification for Functional Safety Hardware Process (Rev. B) 09 Jun 2022
Certificate Automotive PPAP Documentation 18 Jun 2021
More literature Hercules™ Diagnostic Library Test Automation Unit User Guide (Rev. B) PDF | HTML 09 Jan 2020
More literature HALCoGen-CSP 04.07.01 (Rev. C) PDF | HTML 08 Jan 2020
Functional safety information HALCoGen-CSP Installation Guide (Rev. B) PDF | HTML 08 Jan 2020
Functional safety information HALCoGen-CSP User's Guide (Rev. C) PDF | HTML 08 Jan 2020
Functional safety information Hercules Diagnostic Library -TAU Installation Guide (Rev. B) PDF | HTML 08 Jan 2020
User guide Hercules Diagnostic Library CSP Without LDRA 29 Oct 2019
More literature Diagnostic Library CSP Release Notes 17 Oct 2019
Application note HALCoGen Ethernet Driver With lwIP Integration Demo and Active Webserver Demo PDF | HTML 13 Sep 2019
Application note Hercules PLL Advisory SSWF021#45 Workaround (Rev. B) PDF | HTML 09 Sep 2019
Application note CAN Bus Bootloader for Hercules Microcontrollers PDF | HTML 21 Aug 2019
Application note HALCoGen CSP Without LDRA Release_Notes 19 Aug 2019
User guide HALCoGen-CSP Without LDRA Installation Guide PDF | HTML 19 Aug 2019
User guide HALCoGen-CSP Without LDRA User's Guide PDF | HTML 19 Aug 2019
User guide Hercules Diagnostic Library - Without LDRA Installation Guide PDF | HTML 19 Aug 2019
User guide Hercules™ Diag Lib Test Automation Unit Without LDRA User's Guide PDF | HTML 19 Aug 2019
Functional safety information Certification for SafeTI Functional Safety Hardware Process (Rev. A) 07 Jun 2019
Application note Interfacing the Embedded 12-Bit ADC in a TMS570LS31x/21x and RM4x Series MCUs (Rev. A) 20 Apr 2018
Application note FreeRTOS on Hercules Devices_new 19 Apr 2018
Application note MPU and Cache Settings in TMS570LC43x/RM57x Devices 19 Apr 2018
Application note Sharing FEE Blocks Between the Bootloader and the Application 07 Nov 2017
Application note Sharing Exception Vectors on Hercules™ Based Microcontrollers 27 Mar 2017
Application note Hercules AJSM Unlock (Rev. A) PDF | HTML 19 Oct 2016
Functional safety information Safety Manual for TMS570LC4x Hercules ARM Safety Critical Microcontrollers (Rev. A) 19 Oct 2016
Certificate TUEV SUED Certification for TMS570LC43x 19 Oct 2016
Application note How to Create a HALCoGen Based Project For CCS (Rev. B) 09 Aug 2016
Application note Using the CRC Module on Hercules™-Based Microcontrollers 04 Aug 2016
Application note Using the SPI as an Extra UART Transmitter 26 Jul 2016
White paper Hercules MCUs for Use in Electrical Vehicle Battery Management system 12 May 2016
Functional safety information Functional Safety Audit: SafeTI Functional Safety Hardware Development (Rev. A) 25 Apr 2016
Application note High Speed Serial Bus Using the MibSPIP Module on Hercules-Based MCUs 22 Apr 2016
Application note TMS570LC4357 and RM57L843 On-Chip Temperature Sensor Measurements 18 Jan 2016
Functional safety information Enabling Functional Safety Using SafeTI Diagnostic Library 18 Dec 2015
White paper Hercules™ MCU: Features Applicable to Use in High-Speed Rail 02 Nov 2015
Application note Triggering ADC Using Internal Timer Events on Hercules MCUs 19 Oct 2015
White paper Extending TI’s Hercules MCUs with the integrated flexible HET 29 Sep 2015
Application note PWM Generation and Input Capture Using HALCoGen N2HET Module 30 Jun 2015
Functional safety information Foundational Software for Functional Safety 12 May 2015
Application note Sine Wave Generation Using PWM With Hercules N2HET and HTU 12 May 2015
Application note Triangle/Trapezoid Wave Generation Using PWM With Hercules N2HET 01 May 2015
Application note Nested Interrupts on Hercules ARM Cortex-R4/5-Based Microncontrollers 23 Apr 2015
White paper Latch-Up White Paper PDF | HTML 22 Apr 2015
Application note Interrupt and Exception Handling on Hercules ARM Cortex-R4/5-Based MCUs 20 Apr 2015
Application note Monitoring PWM Using N2HET 02 Apr 2015
Application note Hercules SCI With DMA 22 Mar 2015
Certificate TÜV NORD Certificate for Functional Safety Software Development Process 03 Feb 2015
Functional safety information Calculating Equivalent Power-on-Hours for Hercules Safety MCUs 26 Jan 2015
Application note Limiting Clamp Currents on TMS470/TMS570 Digital and Analog Inputs (Rev. A) 08 Dec 2014
Functional safety information TUV SUD ISO-13849 Safety Architecture Concept Study 02 Jul 2014
More literature HaLCoGen Release Notes 25 Jun 2014
Functional safety information Hercules TMS570LC/RM57Lx Safety MCUs Development Insights Using Debug and Trace 21 May 2014
Application note Interfacing TPS65381 With Hercules Microcontrollers (Rev. A) 14 Feb 2014
User guide Trace Analyzer User's Guide (Rev. B) 18 Nov 2013
Functional safety information IEC 60730 and UL 1998 Safety Standard Compliance Made Easier with TI Hercules 03 Oct 2013
White paper Model-Based Tool Qualification of the TI C/C++ ARM® Compiler 06 Jun 2013
Functional safety information Accelerating safety-certified motor control designs (Rev. A) 04 Oct 2012
Application note Hercules Family Frequency Slewing to Reduce Voltage and Current Transients 05 Jul 2012
Application note Basic PBIST Configuration and Influence on Current Consumption (Rev. C) 12 Apr 2012
Application note Verification of Data Integrity Using CRC 17 Feb 2012
Application note FlexRay Transfer Unit (FTU) Setup 26 Jan 2012
User guide HET Integrated Development Environment User's Guide (Rev. A) 17 Nov 2011
Functional safety information Important ARM Ltd Application Notes for TI Hercules ARM Safety MCUs 17 Nov 2011
Functional safety information Execution Time Measurement for Hercules ARM Safety MCUs (Rev. A) 04 Nov 2011
Application note Use of All 1'’s and All 0's Valid in Flash EEPROM Emulation 27 Sep 2011
Application note 3.3 V I/O Considerations for Hercules Safety MCUs (Rev. A) 06 Sep 2011
Functional safety information ADC Source Impedance for Hercules ARM Safety MCUs (Rev. B) 06 Sep 2011
Functional safety information Configuring a CAN Node on Hercules ARM Safety MCUs 06 Sep 2011
Functional safety information Configuring the Hercules ARM Safety MCU SCI/LIN Module for UART Communication (Rev. A) 06 Sep 2011
Functional safety information Leveraging the High-End Timer Transfer Unit on Hercules ARM Safety MCUs (Rev. A) 06 Sep 2011
Functional safety information Hercules™ Microcontrollers: Real-time MCUs for safety-critical products 02 Sep 2011
Application note ECC Handling in TMSx70-Based Microcontrollers 23 Feb 2011
User guide TI ICEPick Module Type C Reference Guide Public Version 17 Feb 2011
Application note NHET Getting Started (Rev. B) 30 Aug 2010
Functional safety information Generating Operating System Tick Using RTI on a Hercules ARM Safety MCU 13 Jul 2010
Functional safety information Usage of MPU Subregions on TI Hercules ARM Safety MCUs 10 Mar 2010
User guide TI Assembly Language Tools Enhanced High-End Timer (NHET) Assembler User's Guide 04 Mar 2010
White paper Discriminating between Soft Errors and Hard Errors in RAM White Paper 04 Jun 2008

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