3.1.3 Memory Allocation – Linker Command Files

As discussed in Section 2, the linker command file tells the linker where to allocate the compiler generated sections. The C/C++ Header Files and Peripheral Examples provide standard linker command files for use in applications.

Three linker command files are supplied in the associated code files to configure the memory allocation:

• F280xx_nonBIOS_flash.cmd
• F281x_nonBIOS_flash.cmd
• F2833x_nonBIOS_flash.cmd

Each file is generally written in the same manner with small differences in the memory layout (device specific). The MEMORY portion of the linker command file defines the memory available on the device to linked sections. The memory map of the device is used for this process. The memory map is found in the device-specific datasheet. For more information, see TMS320F2810, TMS320F2811, TMS320F2812, TMS320C2810, TMS320C2811, TMS320C2812 Digital Signal Processors Data Manual (SPRS174O), TMS320F2809, F2808, F2806, F2802, F2801, C2802, C2801, and F2801x DSPs Data Manual (SPRS230), and TMS320F28335, TMS320F28334, TMS320F28332 TMS320F28235, TMS320F28234, TMS320F28232 Digital Signal Controllers (DSCs) Data Manual (SPRS439).

Figure 1 shows the memory map of the TMS320F2808.

The TMS320F28xxx DSCs contain RAM internally to the device that can be allocated in single sections or in larger expanded sections, since it is predominately contiguous within the memory map. As shown in the memory map, the F2808 contains L0, L1, and H0 SARAMs mapped in contiguous memory spaces allowing the creation of one large block of memory. This RAM block can be defined within the MEMORY portion of the .cmd file as follows:

RAM_H0L0L1 : origin = 0x008000, length = 0x004000 /* on-chip RAM */

The rest of the memory would also be defined in the MEMORY section. For an example of complete memory allocation, see the linker command files included in the associated code files.

The second portion of the linker command file is the SECTIONS specification. This is where the actual compiler sections are linked to the memory areas. All of the sections from the DSP28xxx_CodeStartBranch.asm and DSP28xxx_SectionCopy_nonBIOS.asm are loaded and ran from the Flash memory. This allocation is shown below.

codestart : > BEGIN_FLASH, PAGE = 0 /* Used by file CodeStartBranch.asm */ wddisable : > FLASH_AB, PAGE = 0 /* Used by file CodeStartBranch.asm */ copysections : > FLASH_AB, PAGE = 0 /* Used by file SectionCopy.asm */

The other initialized compiler sections are allocated to load to the Flash but run from the internal RAM. This is achieved by specifying the LOAD and RUN directives. An example of this allocation is shown below.

.text : LOAD = FLASH_AB, PAGE = 0 /* Load section to Flash */ RUN = RAM_H0L0L1,PAGE = 0 /* Run section from RAM */ LOAD_START(_text_loadstart), RUN_START(_text_runstart), SIZE(_text_size)

To gain access to the specific addresses associated with a section, the LOAD_START, RUN_START, and SIZE address and dimension directives are used as shown above. The addresses and size produced by these directives are used by the DSP28xxx_SectionCopy_nonBIOS.asm file to point to the correct addresses during the copy. DSP28xxx_SectionCopy_nonBIOS.asm references these values by creating global variables as shown below.

.global _cinit_loadstart, _cinit_runstart, _cinit_size .global _const_loadstart, _const_runstart, _const_size .global _econst_loadstart, _econst_runstart, _econst_size .global _pinit_loadstart, _pinit_runstart, _pinit_size .global _switch_loadstart, _switch_runstart, _switch_size .global _text_loadstart, _text_runstart, _text_size

For more information regarding linker command files and the address and dimension operators, see the TMS320C28x Assembly Language Tools User’s Guide (SPRU513).