SPRADM6 December   2024 AM62D-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
    1. 1.1 Load Binaries to AM62D
  5. 2Processor Core Benchmarks
    1. 2.1 C7x DSP Benchmark
      1. 2.1.1 Fast Fourier Transform
      2. 2.1.2 Digital Signal Processing
        1. 2.1.2.1 FIR
        2. 2.1.2.2 Cascade Biquad
        3. 2.1.2.3 Dot Product
      3. 2.1.3 Mathematical Operations
    2. 2.2 Dhrystone on A53 cores
  6. 3Memory System Benchmarks
    1. 3.1 Critical Memory Access Latency
    2. 3.2 UDMA: DDR to DDR Data Copy
    3. 3.3 C7x DRU Performance: Block Copy with DMA
  7. 4Application Specific Benchmarks
    1. 4.1 SBL Boot Time
    2. 4.2 IPC Performance
    3. 4.3 Flash
    4. 4.4 Application Specific Latency
  8. 5Summary
  9. 6References

3.1 Critical Memory Access Latency

This section provides the read memory-access latency from processors in AM62Dx to various memory destinations in the system. The measurements were made on the AM62Dx platform using bare-metal silicon verification tests that are not currently included in the SDK. The tests executed on A53, C7x and R5F processor out of the LPDDR4. Each test includes a loop of 8192 iterations to read a total of 32KB of data. The number of cycles for each test were counted and divided by the respective processor clock frequency to obtain latency time. Table 3-1 shows the average latency results. Note that "Local Path" and "Extrefers to accessing

Table 3-1 Critical Memory Access Latency of A53, C7x, R5F MCU, and R5F WKUP
MemoryArm-Cortex-A53
[Avg ns]		C7x DSP [Avg ns]Arm-Cortex-R5F MCU [Avg ns]Arm-Cortex-R5F WKUP [Avg ns]
LPDDR4137154202172
OCSRAM MAIN595712277
OCSRAM MCU1201185885
OCSRAM WKUP210189203156
C7X SRAM - Local Path

(C7X accessing internal memory)

NA20NANA
C7X SRAM - External Path

(C7X's internal memory accessed by an external core)

80NA151103
R5F MCU TCM - Local Path

(R5F MCU accessing internal memory)

NANA1NA
R5F MCU TCM - External Path

(R5F MCU internal memory accessed by an external core)

143144NA120
R5F WKUP TCM - Local Path

(R5F WKUP accessing internal memory)

NANANA1
R5F WKUP TCM - External Path

(R5F WKUP internal memory accessed by other cores)

112108120NA

Tests were done at 0.75V VDD_CORE settings (A53 : 1.25GHz, C7x DSP: 1.0GHz and R5: 800MHz) and LPDDR4 at 3200MT/s.