SPRUIY3 February   2023 TMS320F2800133 , TMS320F2800135 , TMS320F2800137 , TMS320F2800152-Q1 , TMS320F2800153-Q1 , TMS320F2800154-Q1 , TMS320F2800155 , TMS320F2800155-Q1 , TMS320F2800156-Q1 , TMS320F2800157 , TMS320F2800157-Q1 , TMS320F280021 , TMS320F280021-Q1 , TMS320F280023 , TMS320F280023-Q1 , TMS320F280023C , TMS320F280025 , TMS320F280025-Q1 , TMS320F280025C , TMS320F280025C-Q1

 

  1.   Abstract
  2.   Trademarks
  3. 1Feature Differences Between F28002x, F280015x and F280013x
    1. 1.1 F28002x, F280015x and F280013x Feature Comparison
      1. 1.1.1 F28002x, F280013x and F280015x Superset Device Comparison
  4. 2PCB Hardware Changes
    1. 2.1 PCB Hardware Changes for the 80-Pin PN, 64-Pin PM and 48-Pin PT or PHP Packages
    2. 2.2 New and Existing PCB Migration
  5. 3Feature Differences for System Consideration
    1. 3.1 New Features in F280013x and F280015x
      1. 3.1.1 Secure Boot/JTAG Lock
      2. 3.1.2 Embedded Pattern Generator (EPG)
      3. 3.1.3 Lockstep Compare Module (LCM)
      4. 3.1.4 INTOSC External Precision Resistor (ExtR)
    2. 3.2 Communication Module Changes
    3. 3.3 Control Module Changes
    4. 3.4 Analog Module Differences
      1. 3.4.1 CMPSS Module Variants
    5. 3.5 Other Device Changes
      1. 3.5.1 PIE Channel Mapping
      2. 3.5.2 Bootrom
      3. 3.5.3 CLB and Motor Control Libraries
      4. 3.5.4 AGPIO
        1. 3.5.4.1 AGPIO Filter
        2. 3.5.4.2 Digital Inputs and Outputs on ADC Pins (AGPIOs)
    6. 3.6 Power Management
      1. 3.6.1 LDO/VREG
      2. 3.6.2 POR/BOR
      3. 3.6.3 Power Consumption
    7. 3.7 Memory Module Changes
    8. 3.8 GPIO Multiplexing Changes
    9. 3.9 Analog Multiplexing Changes
  6. 4Application Code Migration From F28002x to F280015x or F280013x
    1. 4.1 C2000Ware Header Files
    2. 4.2 Linker Command Files
    3. 4.3 C2000Ware Examples
  7. 5Specific Use Cases Related to F280015x and F280013x New Features
    1. 5.1 EPG
  8. 6EABI Support
    1. 6.1 Flash API
  9. 7References

1.1.1 F28002x, F280013x and F280015x Superset Device Comparison

Table 1-1 F28002x, F280013x and F280015x Superset Device Comparison
Feature F28002x F280015x F280013x
ALL

F2800157, F2800155, F2800153

F2800156, F2800154, F2800152

 F2800137, F2800135, F2800133 F2800132
80 PN 64 PM 48 PT 80 PN 64 PM 48 PHP 32 RHB

80 PN

64 PM

48 PHP

32 RHB

 64 VPM 64 PM 48 PT 48 RGZ 32 RHB 48 PT 48 RGZ 32 RHB
Processor and Accelerators
C28x Frequency (MHz) 100 120
FPU Yes
Fast Integer Division Yes -
VCRC Yes -
TMU Yes
NLPID Yes -
Lockstep Compare Module (LCM) - Yes -
6–Channel DMA – Type 0 Yes -
External interrupts 5
Memory
Flash 128KB (64Kw) 256KB (128Kw) - 157, 156
128KB (64Kw) - 155, 154
64KB (32Kw) - 153, 152		 256KB (128Kw) - 137
128KB (64Kw) - 135, 135V
64KB (32Kw) - 133, 132
RAM 24KB (12Kw) 36KB (18Kw)
ECC FLASH, Mx, LSx FLASH, Mx
Parity GSx, ROM LSx, ROM
Code security for on–chip flash and RAM Yes
System
Configurable Logic Block (CLB) 2 Tiles -
Embedded Pattern Generator (EPG) - Yes
Motor Control Libraries in ROM Yes -
32–bit CPU timers 3
Background CRC (BGCRC) Yes -
Secure Boot – Yes
JTAG Lock – Yes
HWBIST Yes -
Nonmaskable Interrupt Watchdog (NMIWD) timers 1
Watchdog timers 1
Crystal oscillator/External clock input 1
0–pin internal oscillator 2
INTOSC with ExtR Support - Yes
Pins and Power Supply
Internal 3.3v to 1.2v Voltage Regulator VREG LDO Yes
GPIO Pins GPIO 39 26 14 37 22 15 9 37 22 15 9 22 23 13 16 10 13 16 10
AGPIO (analog with digital inputs and outputs) - 11 11 8 5 11 11 8 5 11 11 8 8 5 8 8 5
JTAG and Oscillator GPIO 4 (2 from cJTAG and 2 from X1/X2)
Total GPIO 43 30 18 52 37 27 18 52 37 27 18 37 38 25 28 19 25 28 19
AIO (analog with digital inputs) 16 16 14 10 10 9 6 10 10 9 6 10 10 9 9 6 9 9 6
Total GPIO and AIO 59 46 32 62 47 36 24 62 47 36 24 47 48 34 37 25 34 37 25
Analog Peripherals
ADC 12–bit Number of ADCs 2
Conversion-time (ns) / MSPS (AIO pins) 290 ns / 3.45 MSPS 250 ns / 4.00 MSPS 290 ns / 3.45 MSPS 250 ns / 4.00 MSPS 290 ns / 3.45 MSPS
Conversion-time (ns) / MSPS (AGPIO pins) - 266 ns / 3.75 MSPS 300 ns / 3.33 MSPS 266 ns / 3.75 MSPS 300 ns / 3.33 MSPS
ADC channels (single–ended) 16 16 14 21 17 11 21 17 11 21 21 17 17 11 17 17 11
Temperature sensor 1
CMPSS (each CMPSS has two comparators) 4 (with two internal dynamic DACs and single ramp generator) 1 (with two internal dynamic DACs and dual ramp generators) - 1 (with two internal dynamic DACs and single ramp generator)
CMPSS DAC Buffered Output (CMPx_DACL) - 1 (mutually exclusive with using CMPSS for compare)

-

 1 (mutually exclusive with using CMPSS for compare)
CMPSS_LITE (each CMPSS_LITE has two comparators) - 3 (with two internal static DAC)
Control Peripherals
eCAP/HRCAP modules - Type 2 3 (1 with HRCAP capability) 3 (0 with HRCAP capability) 2 (0 with HRCAP capability)
ePWM/HRPWM channels – Type 4 14 (8 with HRPWM) 14 (4 with HRPWM) 14 (0 with HRPWM) 14 (2 with HRPWM) 6 (2 with HRPWM)
eQEP modules - Type 2 2 1
Communication Peripherals
CAN (DCAN) – Type 0 1 -
MCAN (CAN FD) – Type 2 – 1 -
FSI 1 (1 RX and 1 TX) – Type 1 -
I2C – Type 1 2
LIN – Type 1 2 1 -
HIC – Type 1 1 -
PMBus – Type 0 1 -
SCI – Type 0 1 3
SPI – Type 2 2 1
Package Options, Temperature, and Qualification
S: -40°C to 125°C (TJ) Yes No

Yes

No

 Yes
Q: –40°C to 125°C (TA) (AEC Q100 qualification) Yes No