SPRUJ10D May   2022  – September 2023

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Preface: Read This First
    1. 2.1 Sitara MCU+ Academy
    2. 2.2 If You Need Assistance
    3. 2.3 Important Usage Notes
  5. 2Kit Overview
    1. 3.1 Kit Contents
    2. 3.2 Key Features
    3. 3.3 Component Identification
    4. 3.4 BoosterPacks
    5. 3.5 Compliance
    6. 3.6 Security
  6. 3Board Setup
    1. 4.1 Power Requirements
      1. 4.1.1 Power Input Using USB Type-C Connector
      2. 4.1.2 Power Status LEDs
      3. 4.1.3 Power Tree
    2. 4.2 Push Buttons
    3. 4.3 Boot Mode Selection
  7. 4Hardware Description
    1. 5.1  Functional Block Diagram
    2. 5.2  GPIO Mapping
    3. 5.3  Reset
    4. 5.4  Clock
    5. 5.5  Memory Interface
      1. 5.5.1 QSPI
      2. 5.5.2 Board ID EEPROM
    6. 5.6  Ethernet Interface
      1. 5.6.1 Ethernet PHY #1 - CPSW RGMII/ICSSM
      2. 5.6.2 Ethernet PHY #2 - CPSW RGMII/ICSSM
      3. 5.6.3 LED Indication in RJ45 Connector
    7. 5.7  I2C
    8. 5.8  Industrial Application LEDs
    9. 5.9  SPI
    10. 5.10 UART
    11. 5.11 MCAN
    12. 5.12 FSI
    13. 5.13 JTAG
    14. 5.14 Test Automation Header
    15. 5.15 LIN
    16. 5.16 MMC
    17. 5.17 ADC and DAC
    18. 5.18 EQEP and SDFM
    19. 5.19 EPWM
    20. 5.20 BoosterPack Headers
    21. 5.21 Pinmux Mapping
  8. 5References
    1. 6.1 Reference Documents
    2. 6.2 Other TI Components Used in This Design
  9. 6Revision History

ADC and DAC

The AM263x LaunchPad maps 18 ADC inputs to the BoosterPack header. All of the ADC inputs that are used in the LaunchPad are ESD protected.

GUID-20220503-SS0I-D5GR-HSNQ-W56B2RLDZCSF-low.png Figure 4-20 ADC/DAC Signal Pathing

Seven of the ADC inputs and one instance of the DAC_OUT signal is routed to a 2:1 mux (TS3DDR3812RUAR) to offer alternate BoosterPack functionality. The select line of the mux is driven by an AM263x SoC GPIO signal.

Table 4-14 ADC BoosterPack Mux
GPIO63 Condition Funciton of Mux
LOW ADC input/DAC_OUT Selected Port A ↔ Port B
HIGH Alternate BP functionality Selected Port A ↔ Port C

The ADC and DAC require a voltage reference. The AM263x LaunchPad has two switches that allow the user to switch between the DAC and ADC VREF source.

GUID-20220503-SS0I-NBBZ-TP1D-7HQXFHWQBNKB-low.png Figure 4-21 ADC and DAC VREF Switches

The DAC VREF Switch (S1) is a single pole double throw switch that controls the input of the ADC VREF inputs of the AM263x SoC.

Table 4-15 DAC VREF Switch
DAC VREF Switch Position Reference Selection
Pin 1-2 AM263x on-die LDO
Pin 2-3 External DAC VREF Header

The ADC VREF Switch (S2) contains two single pole double throw switch that controls the input of the ADC VREF inputs of the AM263x SoC.

Table 4-16 ADC VREF Switch
ADC VREF Switch Position Reference Selection
Pin 1-2 OPEN - Allow for reference to be AM263x on-die LDO reference
Pin 2-3 External ADC VREF Header
Pin 4-5 OPEN - Allow for reference to be AM263x on-die LDO reference
Pin 5-6 External ADC VREF Header