SPRZ570A November   2023  – May 2024 AM263P4 , AM263P4-Q1

 

  1.   1
  2.   Abstract
  3. 1Usage Notes and Advisories Matrices
  4. 2Silicon Revision 1.0 Usage Notes and Advisories
    1. 2.1 Silicon Revision 1.0 Usage Notes
      1.      i2324
    2. 2.2 Silicon Revision 1.0 Advisories
      1.      i2189
      2.      i2310
      3.      i2374
      4.      i2311
      5.      i2345
      6.      i2351
      7.      i2352
      8.      i2353
      9.      i2354
      10.      i2356
      11.      i2357
      12.      i2358
      13.      i2359
      14.      i2383
      15.      i2392
      16.      i2393
      17.      i2394
      18.      i2401
      19.      i2403
      20.      i2404
      21.      i2405
      22.      i2426
      23.      i2427
      24.      i2428
      25.      i2433
      26.      i2438
      27.      i2439
  5. 3Trademarks
  6. 4Revision History

i2354

CONTROLSS-SDFM: Two Back-to-Back Writes to SDCPARMx Register Bit Fields CEVT1SEL, CEVT2SEL, and HZEN Within Three SD-Modulator Clock Cycles can Corrupt SDFM State Machine, Resulting in Spurious Comparator Events

Details:

Back-to-back writes to SDCPARMx register bit fields CEVT1SEL, CEVT2SEL, and HZEN within three SD-modulator clock cycles can potentially corrupt the SDFM state machine, resulting in spurious comparator events, which can potentially trigger CPU interrupts, CLA tasks, ePWM XBAR events, and GPIO output X-BAR events if configured appropriately.

Workaround(s):

Avoid back-to-back writes within three SD-modulator clock cycles or have the SDCPARMx register bit fields configured in one register write.