SWRA825 January 2025 IWR6843 , LP87745-Q1
The device-specific data sheet of the IWR6843 specifies that the crystal frequency tolerance should be ±50ppm and that those tolerances include initial frequency tolerance, drift over temperature aging and frequency pulling due to incorrect load capacitance.
In the case where a realistic failure of any of the above could lead to a drift of the crystal beyond the ±50ppm it should be noted that the only independent clock monitor in the IWR6843 is the RCOSC that only provides a few % of accuracy diagnostics. For more information, see the Monitoring and Diagnostic Mechanisms section in the IWR6843, IWR6443 Single-Chip 60- to 64-GHz mmWave Sensor Data Sheet. So an external monitor should be considered of which an option would be to output on pin N7 (MCU_CLK_OUT) with an output clock higher than 20MHz clock to avoid spurs in IF band (rather than OSC_CLKOUT on A14, as OSC_CLK_OUT only monitors the slicer output rather than the full clock tree. A simple MCU with a carefully selected additional crystal implementing a dual counter could help achieve this.