TIDA035 October   2020

 

  1.   Abstract
  2.   Trademarks
  3. 1Introduction
  4. 2Two-point Insulation Resistance Measurements
  5. 3Equation Verification by Simulation
  6. 4Op-amp Caused Error Analysis
    1. 4.1 Input offset voltage
    2. 4.2 Input bias current
    3. 4.3 Open-loop gain
  7. 5Summary
  8. 6References

Input bias current

In the above calculations it is assumed that the input impedance is infinite and there is no current flowing into the inverting input (–). But actually a small amount of current must flow into the inputs due to bias requirement or parasitic leakage in real op-amp. The input bias current can either flow into or out of the inputs.

GUID-20201012-CA0I-3P6K-XD4D-1CTZ4J18J8QQ-low.gif Figure 4-1 Input Bias Current Flows into or out of Inverting Input

If the input bias current is considered in Equation 2 and Equation 5, they can be revised as follows:

Equation 11. GUID-20201012-CA0I-GVG8-HQZG-R91KCRK0VV0Z-low.gif
Equation 12. GUID-20201012-CA0I-GL88-JJZM-FPQJ2HQLPMWH-low.gif

Then ISO_POS and ISO_NEG can be obtained including input bias current error respectively.

Equation 13. GUID-20201012-CA0I-SVH5-R5MR-LVBTZLFSGXLB-low.gif
Equation 14. GUID-20201012-CA0I-MJRC-FMQR-HJ31WZV081TF-low.gif