TIDT225
March 2021
1
Description
2
Test Prerequisites
2.1
Voltage and Current Requirements
2.2
Required Equipment
3
Testing and Results
3.1
Thermal Images
3.2
Efficiency and Power Dissipation Graphs
3.3
Efficiency and Power Dissipation Data
3.4
Cross Regulation
3.5
Loop Gain
4
Waveforms
4.1
Start-up
4.2
Switching Waveforms
4.3
Output Voltage Ripple
4.4
Load Transients
4.2
Switching Waveforms
Switching behavior is shown in the following figures.
Figure 4-5
FET Switch Node Voltage at TP3 With Vin = 7 V and Maximum Loads
Figure 4-6
FET Switch Node Voltage at TP3 With Vin = 12 V and Maximum Loads
Figure 4-7
FET Switch Node Voltage at TP3 With Vin = 32 V and Maximum Loads
Figure 4-8
FET Switch Node Voltage at TP3 With Vin = 7 V and no Loads
Figure 4-9
FET Switch Node Voltage at TP3 With Vin = 12 V and no Loads
Figure 4-10
FET Switch Node Voltage at TP3 With Vin = 27 V and no Loads
Figure 4-11
FET Switch Node Voltage at TP3 With Vin = 32 V and no Loads (Note Pulse Skipping)