TIDT387 March   2024 LM25148-Q1 , LM74910-Q1 , TPS389006-Q1 , TPS62874-Q1 , TPS62875-Q1 , TPS62876-Q1 , TPS62877-Q1 , TPS746-Q1 , TPS7B69-Q1

 

  1.   1
  2.   Description
  3.   Features
  4.   Applications
  5. 1Test Prerequisites
    1. 1.1 Voltage and Current Requirements
    2. 1.2 Required Equipment
    3. 1.3 Considerations
  6. 2Testing and Results
    1. 2.1 Efficiency and Power Loss Graphs
    2. 2.2 VCCINT - Core Rail Current Sharing Tolerances
    3. 2.3 Thermal Images
    4. 2.4 Dimensions
  7. 3Waveforms
    1. 3.1 Switching
    2. 3.2 Output Voltage Ripple
    3. 3.3 Load Transients
    4. 3.4 Start-Up Sequence
    5. 3.5 Front-End Protection (FEP) Test Results

3.5 Front-End Protection (FEP) Test Results

Figure 3-78 to Figure 3-62 show the UVLO, OVLO, and OCP thresholds of the front-end protection circuit.

GUID-20240212-SS0I-TVVR-NJNZ-SF6X6W6JPQW4-low.svgFigure 3-58 Front-End Protection, UVLO Rising Enable, 5V Pre-Regulator Buck Output No Load (FEP UVLO Enable Threshold ≈ 6.0V; 5V Pre-Regulator UVLO Enable Threshold ≈ 6.5V)
GUID-20240212-SS0I-K4MW-MCDS-0ZHJBGDTNLWH-low.svgFigure 3-60 Front-End Protection, OVLO Rising Disable, 5V Pre-Regulator Buck Output Loaded at 5A Load (FEP OVLO Disable Threshold ≈ 20.3V; 5V Pre-Regulator UVLO Disable Threshold ≈ 5.2V)
GUID-20240212-SS0I-ZFKC-FDPJ-SJ6NGW8B4LB2-low.svgFigure 3-62 Front-End Protection, OCP Threshold Test, 5V Pre-Regulator Buck at 6VIN With the Load Progressively Increasing; 100kΩ “TMR” Resistor Installed for this Test (FEP OCP Threshold ≈ 12.65A)
GUID-20240212-SS0I-HN15-KT1N-L7TZJWBKTXPZ-low.svgFigure 3-59 Front-End Protection, UVLO Falling Disable, 5V Pre-Regulator Buck Output Loaded at 5A Load (FEP UVLO Disable Threshold ≈ 5.6V; 5V Pre-Regulator UVLO Disable Threshold ≈ 5.2V)
GUID-20240212-SS0I-S3TG-NND4-6CQZLWRDW7VM-low.svgFigure 3-61 Front-End Protection, OVLO Falling Enable, 5V Pre-Regulator Buck Output Loaded at 5A Load (FEP OVLO Enable Threshold ≈ 18.8V; 5V Pre-Regulator UVLO Enable Threshold ≈ 6.75V)