SBAA500A May   2021  – September 2021 PCM6020-Q1 , PCM6240-Q1 , PCM6260-Q1 , PCM6340-Q1

 

  1.   Trademarks
  2. 1Introduction
  3. 2Slave Mode Power Consumption with PLL Enabled
  4. 3Slave Mode Power Consumption with PLL Disabled
  5. 4Digital Microphone Power Consumption
  6. 5MICBIAS Power Consumption
  7. 6Settings for Lowest Power Consumption
  8. 7Revision History

1 Introduction

Power consumption on PCM6xx0 devices is highly dependent on the usage scenario and features enabled on these devices. The following tables summarize the power consumption based on the following:

  • Supply voltage
  • Sampling Frequency (FS)
  • Number of channels
  • Decimation filter options
  • Bit clock (BCLK) to Frame sync (FSYNC) ratio
  • PLL enabled or disabled
  • Converted word length

The tables report the average active current consumed on the Analog Supply, AVDD. This supply includes all the internal analog and digital circuits, but excludes the current consumed by the I/O pins due to its application dependencies. I/O power is dependent upon the following:

  • Load capacitance of the system bus interface
  • Data output clock rate
  • Data conversion output activity
  • Bus interface pullups or pull downs
  • Frequency of ADC commands sent by microprocessor