SBAA804 April   2026 ADC168M102R-SEP

 

  1.   1
  2.   Abstract
  3. 1Introduction
  4. 2Hardware Platform
  5. 3Hardware Interfaces
    1. 3.1 Communication via McBSP
      1. 3.1.1 Using McBSP1
      2. 3.1.2 Channel Identification
    2. 3.2 Communication via SPI and ePWM
      1. 3.2.1 Using SPI and ePWM
      2. 3.2.2 SPI Peripheral Requirement
  6. 4Software Interface
    1. 4.1 McBSP Settings
    2. 4.2 SPI and ePWM Settings
    3. 4.3 Software Flow
  7. 5Summary
  8. 6References

1 Introduction

The ADC168M102R-SEP is a dual, 16-bit, 1MSPS, radiation-tolerant, SAR ADC with eight input channels, which is configurable as eight pseudo-differential inputs (4x2) or four fully differential inputs (2x2). The 8 input channels are grouped into two pairs, followed by two independent sample and hold circuits for simultaneous signal acquisition. Based on the MODE pin M0/M1 configuration, this part can be configured as any combination of manual or automatic sequencing channel selection with two serial data output or single serial data output, as listed in Table 1-1.

Table 1-1 Channel Selection
M0M1Channel SelectionOutput Pin Used
00Manual (via SDI)SDOA and SDOB
01Manual (via SDI)SDOA only
10AutomaticSDOA and SDOB
11AutomaticSDOA only

The channel information bits (one bit of channel indicator, followed by one bit of ADC indicator before the most significant bit of conversion result) are only available in fully-differential operating mode. For the consideration of channel identification, manual channel selection mode should be used when ADC168M102R-SEP is operating in pseudo-differential operating mode. Furthermore, for compatibility with most processors, single serial data output mode is selected in this application note, therefore, Mode II is mainly discussed in the following sections.