A differential input signal of 0V ideally produces a stream of ones and zeros that are high 50% of the time. A differential input of 250mV (for the AMC1306x25) or 50mV (for the AMC1306x05) produces a stream of ones and zeros that are high 89.06% of the time. With 16 bits of resolution, that percentage ideally corresponds to the code 58368. A differential input of –250mV (–50mV for the AMC1306x05) produces a stream of ones and zeros that are high 10.94% of the time and ideally results in code 7168 with 16-bit resolution. These input voltages are also the specified linear ranges of the different AMC1306 versions with performance as specified in this document. If the input voltage value exceeds these ranges, the output of the modulator shows nonlinear behavior when the quantization noise increases. The output of the modulator clips with a stream of only zeros with an input less than or equal to –320mV (–64mV for the AMC1306x05) or with a stream of only ones with an input greater than or equal to 320mV (64mV for the AMC1306x05). In this case, however, the AMC1306 generates a single 1 (if the input is at negative full-scale) or 0 every 128 clock cycles to indicate proper device function (see the Section 7.4.1 section for more details). The input voltage versus the output modulator signal is shown in Analog Input Versus the AMC1306 Modulator Output.

Figure 7-5 Analog Input Versus the AMC1306 Modulator Output

The density of ones in the output bitstream for any input voltage value (with the exception of a full-scale input signal, as described in the Section 7.4.2 section) can be calculated using Equation 1:

Equation 1.

The AMC1306 system clock is provided externally at the CLKIN pin. For more details, see the Switching Characteristics table and the Section 7.3.5 section.