SBASB16 November   2025 AMC0380R-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Power Ratings
    6. 6.6  Insulation Specifications
    7. 6.7  Safety-Related Certifications
    8. 6.8  Safety Limiting Values
    9. 6.9  Electrical Characteristics
    10. 6.10 Switching Characteristics
    11. 6.11 Timing Diagram
    12. 6.12 Insulation Characteristics Curves
    13. 6.13 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Analog Input
      2. 7.3.2 Isolation Channel Signal Transmission
      3. 7.3.3 Analog Output
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Input Filter Design
        2. 8.2.2.2 Connecting the REFIN Pin
      3. 8.2.3 Application Curve
    3. 8.3 Best Design Practices
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
      2. 8.5.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

6.9 Electrical Characteristics

minimum and maximum specifications apply from TA = –40°C to +125°C, VDD1 = 3.0V to 5.5V, VDD2 = 3.0V to 5.5V, VREFIN = 3.3V, VSNSP = –1V to +1V, and VSNSN = 0V; typical specifications are at TA = 25°C, VDD1 = 5V, VDD2 = 3.3V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
ANALOG INPUT
RIN Input resistance AMC0380R04-Q1 7 8.3 9.5 MΩ
AMC0380R06-Q1 8.5 10 11.5
Resistive divider ratio VHVIN / VSNSP, AMC0380R04-Q1 400 401 402 V/V
VHVIN / VSNSP, AMC0380R06-Q1 598 601 604
CMTI Common-mode transient immunity SNSP = GND1 150 V/ns
REFERENCE INPUT
RREFIN DC input impedance REFIN to GND2, VREFIN = 3.3V, TA = 25℃ 74 87 100 kΩ
DC input impedance REFIN to GND2, VREFIN = 5V, TA = 25℃ 72 85 98
TCRREFIN Input impedance thermal drift –235 ppm/℃
ANALOG OUTPUT
Nominal attenuation VOUT / VHVIN VREFIN / 2 / |VClipping| V/V
ROUT Output resistance OUTP or OUTN <0.2 Ω
Output short-circuit current sourcing or sinking,
HVIN = GND1, output shorted to
either GND or VDD2		 11 mA
DC ACCURACY
VOS Input offset voltage Referred to SNSP,
TA = 25°C, HVIN = GND1		 –1.5 ±0.4 1.5 mV
Referred to HVIN, TA = 25°C, HVIN = GND1, 
AMC0380R04-Q1		 –600 ±160 600
Referred to HVIN, TA = 25°C, HVIN = GND1, 
AMC0380R06-Q1		 –900 ±240 900
TCVOS Input offset thermal drift(3) Referred to SNSP,
HVIN = GND1		 –0.02 ±0.005 0.02 mV/°C
Referred to HVIN, 
HVIN = GND1, AMC0380R04-Q1		 –8 ±2 8
Referred to HVIN, 
HVIN = GND1, AMC0380R06-Q1		 –12 ±3 12
EA Attenuation error(1) TA = 25°C –0.25% ±0.05% 0.25%
TCEA Attenuation error temperature drift(4) –40 ±20 40 ppm/°C
Nonlinearity(2) –0.025% ±0.01% 0.025%
Output noise VIN = GND1, BW = 50kHz 160 µVrms
PSRR Power-supply rejection ratio(5) VDD1 DC PSRR, HVIN = GND1,
VDD1 from 3V to 5.5V		 –77 dB
VDD1 AC PSRR, HVIN = GND1,
VDD1 with 10kHz / 100mV ripple		 –49
VDD2 DC PSRR, HVIN = GND1,
VDD2 from 3V to 5.5V		 –100
VDD2 AC PSRR, HVIN = GND1,
VDD2 with 10kHz / 100mV ripple		 –62
AC ACCURACY
BW Output bandwidth 120 145 kHz
THD Total harmonic distortion VSNSP = 2VPP, SNSN = GND1,
fIN = 10kHz		 –80 –73 dB
SNR Signal-to-noise ratio VSNSP = 2VPP, SNSN = GND1,
fIN = 1kHz, BW = 10kHz		 78 82 dB
SNR Signal-to-noise ratio VSNSP = 2VPP, SNSN = GND1,
fIN = 10kHz, BW = 50kHz		 75 dB
POWER SUPPLY
IDD1 High-side supply current 4.3 5.6 mA
IDD2 Low-side supply current 4.8 7.4 mA
VDD1UV High-side undervoltage detection threshold VDD1 rising 2.5 2.6 2.7 V
VDD1 falling 1.9 2.0 2.1
VDD2UV Low-side undervoltage detection threshold VDD2 rising 2.3 2.5 2.7 V
VDD2 falling 1.9 2.05 2.2
(1) The typical value includes one sigma statistical variation.
(2) Integral nonlinearity is defined as the maximum deviation from a straight line passing through the end-points of the ideal ADC transfer
function expressed as number of LSBs or as a percent of the specified linear full-scale range FSR.
(3) Offset error drift is calculated using the box method, as described by the following equation:
TCEO = (valueMAX - valueMIN) / TempRange
(4) Attenuation error drift is calculated using the box method, as described by the following equation:
TCEA (ppm) = ((valueMAX - valueMIN) / (value x TempRange)) X 106
(5) This parameter is referred to SNSP.