SBASB74 October   2024 ADS127L21B

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Electrical Characteristics
    6. 5.6  Timing Requirements (1.65V ≤ IOVDD ≤ 2V)
    7. 5.7  Switching Characteristics (1.65V ≤ IOVDD ≤ 2V)
    8. 5.8  Timing Requirements (2V < IOVDD ≤ 5.5V)
    9. 5.9  Switching Characteristics (2V < IOVDD ≤ 5.5V)
    10. 5.10 Timing Diagrams
    11. 5.11 Typical Characteristics
  7. 6 Parameter Measurement Information
    1. 6.1  Offset Error Measurement
    2. 6.2  Offset Drift Measurement
    3. 6.3  Gain Error Measurement
    4. 6.4  Gain Drift Measurement
    5. 6.5  NMRR Measurement
    6. 6.6  CMRR Measurement
    7. 6.7  PSRR Measurement
    8. 6.8  SNR Measurement
    9. 6.9  INL Error Measurement
    10. 6.10 THD Measurement
    11. 6.11 IMD Measurement
    12. 6.12 SFDR Measurement
    13. 6.13 Noise Performance
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Analog Input (AINP, AINN)
        1. 7.3.1.1 Input Range
      2. 7.3.2 Reference Voltage (REFP, REFN)
        1. 7.3.2.1 Reference Voltage Range
      3. 7.3.3 Clock Operation
        1. 7.3.3.1 Internal Oscillator
        2. 7.3.3.2 External Clock
      4. 7.3.4 Modulator
      5. 7.3.5 Digital Filter
        1. 7.3.5.1 Wideband Filter
          1. 7.3.5.1.1 Wideband Filter Options
          2. 7.3.5.1.2 Sinc5 Filter Stage
          3. 7.3.5.1.3 FIR1 Filter Stage
          4. 7.3.5.1.4 FIR2 Filter Stage
          5. 7.3.5.1.5 FIR3 Filter Stage
          6. 7.3.5.1.6 FIR3 Default Coefficients
          7. 7.3.5.1.7 IIR Filter Stage
            1. 7.3.5.1.7.1 IIR Filter Stability
        2. 7.3.5.2 Low-Latency Filter (Sinc)
          1. 7.3.5.2.1 Sinc3 and Sinc4 Filters
          2. 7.3.5.2.2 Sinc3 + Sinc1 and Sinc4 + Sinc1 Cascade Filter
      6. 7.3.6 Power Supplies
        1. 7.3.6.1 AVDD1 and AVSS
        2. 7.3.6.2 AVDD2
        3. 7.3.6.3 IOVDD
        4. 7.3.6.4 Power-On Reset (POR)
        5. 7.3.6.5 CAPA and CAPD
      7. 7.3.7 VCM Output Voltage
    4. 7.4 Device Functional Modes
      1. 7.4.1 Speed Modes
      2. 7.4.2 Idle Mode
      3. 7.4.3 Standby Mode
      4. 7.4.4 Power-Down Mode
      5. 7.4.5 Reset
        1. 7.4.5.1 RESET Pin
        2. 7.4.5.2 Reset by SPI Register Write
        3. 7.4.5.3 Reset by SPI Input Pattern
      6. 7.4.6 Synchronization
        1. 7.4.6.1 Synchronized Control Mode
        2. 7.4.6.2 Start/Stop Control Mode
        3. 7.4.6.3 One-Shot Control Mode
      7. 7.4.7 Conversion-Start Delay Time
      8. 7.4.8 Calibration
        1. 7.4.8.1 OFFSET2, OFFSET1, OFFSET0 Calibration Registers (Addresses 0Ch, 0Dh, 0Eh)
        2. 7.4.8.2 GAIN2, GAIN1, GAIN0 Calibration Registers (Addresses 0Fh, 10h, 11h)
        3. 7.4.8.3 Calibration Procedure
    5. 7.5 Programming
      1. 7.5.1 Serial Interface (SPI)
        1. 7.5.1.1  Chip Select (CS)
        2. 7.5.1.2  Serial Clock (SCLK)
        3. 7.5.1.3  Serial Data Input (SDI)
        4. 7.5.1.4  Serial Data Output/Data Ready (SDO/DRDY)
        5. 7.5.1.5  SPI Frame
        6. 7.5.1.6  Full-Duplex Operation
        7. 7.5.1.7  Device Commands
          1. 7.5.1.7.1 No-Operation
          2. 7.5.1.7.2 Read Register Command
          3. 7.5.1.7.3 Write Register Command
        8. 7.5.1.8  Read Conversion Data
          1. 7.5.1.8.1 Conversion Data
          2. 7.5.1.8.2 Data Ready
            1. 7.5.1.8.2.1 DRDY
            2. 7.5.1.8.2.2 SDO/DRDY
            3. 7.5.1.8.2.3 DRDY Bit
            4. 7.5.1.8.2.4 Clock Counting
          3. 7.5.1.8.3 STATUS Byte
        9. 7.5.1.9  Daisy-Chain Operation
        10. 7.5.1.10 3-Wire SPI Mode
          1. 7.5.1.10.1 3-Wire SPI Mode Frame Reset
        11. 7.5.1.11 SPI CRC
      2. 7.5.2 Register Memory CRC
        1. 7.5.2.1 Main Program Memory CRC
        2. 7.5.2.2 FIR Filter Coefficient CRC
        3. 7.5.2.3 IIR Filter Coefficient CRC
  9. 8 Register Map
  10. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 SPI Operation
      2. 9.1.2 Input Driver
      3. 9.1.3 Antialias Filter
      4. 9.1.4 Reference Voltage
      5. 9.1.5 Simultaneous-Sampling Systems
    2. 9.2 Typical Applications
      1. 9.2.1 A-Weighting Filter Design
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curve
      2. 9.2.2 PGA855 Programmable Gain Amplifier
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 Application Curves
      3. 9.2.3 THS4551 Antialias Filter Design
        1. 9.2.3.1 Design Requirements
        2. 9.2.3.2 Detailed Design Procedure
        3. 9.2.3.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

5.11 Typical Characteristics

AVDD1 = 5V, AVDD2 = 1.8V, AVSS = 0V, IOVDD = 1.8V, VREF = 4.096V, high-reference range, high-speed mode, wideband filter, OSR = 32, 1x input range, input precharge buffers on, reference precharge buffer off, and TA = 25°C (unless otherwise noted)

ADS127L21B Max-Speed Mode, Shorted-Input FFT
Wideband filter
Figure 5-7 Max-Speed Mode, Shorted-Input FFT
ADS127L21B Max-Speed Mode, Shorted-Input FFT
VREF = 2.5V, wideband filter, 2x range
Figure 5-9 Max-Speed Mode, Shorted-Input FFT
ADS127L21B Max-Speed Mode, Shorted-Input FFT
Sinc4 filter, OSR = 12
Figure 5-11 Max-Speed Mode, Shorted-Input FFT
ADS127L21B High-Speed Mode, Shorted-Input FFT
Wideband filter
Figure 5-13 High-Speed Mode, Shorted-Input FFT
ADS127L21B High-Speed Mode, Shorted-Input FFT
VREF = 2.5V, wideband filter, 2x range
Figure 5-15 High-Speed Mode, Shorted-Input FFT
ADS127L21B High-Speed Mode, Shorted-Input FFT
Sinc4 filter, OSR = 12
Figure 5-17 High-Speed Mode, Shorted-Input FFT
ADS127L21B Mid-Speed Mode, Shorted-Input FFT
Wideband filter
Figure 5-19 Mid-Speed Mode, Shorted-Input FFT
ADS127L21B Mid-Speed Mode, Shorted-Input FFT
VREF = 2.5V, wideband filter, 2x range
Figure 5-21 Mid-Speed Mode, Shorted-Input FFT
ADS127L21B Mid-Speed Mode, Shorted-Input FFT
Sinc4 filter, OSR = 12
Figure 5-23 Mid-Speed Mode, Shorted-Input FFT
ADS127L21B Low-Speed Mode, Shorted-Input FFT
Wideband filter
Figure 5-25 Low-Speed Mode, Shorted-Input FFT
ADS127L21B Low-Speed Mode, Shorted-Input FFT
VREF = 2.5V, wideband filter, 2x range
Figure 5-27 Low-Speed Mode, Shorted-Input FFT
ADS127L21B Low-Speed Mode, Shorted-Input FFT
Sinc4 filter, OSR = 12
Figure 5-29 Low-Speed Mode, Shorted-Input FFT
ADS127L21B Max-Speed Mode Code Distributions
262,144 samples
Figure 5-31 Max-Speed Mode Code Distributions
ADS127L21B Mid-Speed Mode Code Distributions
262,144 samples
Figure 5-33 Mid-Speed Mode Code Distributions
ADS127L21B Noise Performance Distributions
Wideband filter, OSR = 64, 30 units
Figure 5-35 Noise Performance Distributions
ADS127L21B Noise Performance vs Reference Voltage
 
Figure 5-37 Noise Performance vs Reference Voltage
ADS127L21B Noise Performance vs Temperature
Sinc4 filter, OSR = 64
Figure 5-39 Noise Performance vs Temperature
ADS127L21B Input Current vs Differential Voltage
Precharge buffers on
Figure 5-41 Input Current vs Differential Voltage
ADS127L21B Input Current vs Differential Voltage
Precharge buffers off
Figure 5-43 Input Current vs Differential Voltage
ADS127L21B Input Current vs Temperature
Precharge buffers off, VIN = full scale, VREF = 2.5V
Figure 5-45 Input Current vs Temperature
ADS127L21B Input Current vs Temperature
Precharge buffers on, VIN = full scale, VREF = 2.5V
Figure 5-47 Input Current vs Temperature
ADS127L21B Offset Error Distribution
30 units
Figure 5-49 Offset Error Distribution
ADS127L21B Long-Term Offset Drift
30 units, offset calibrated at t = 0
Figure 5-51 Long-Term Offset Drift
ADS127L21B Gain Error Distribution
Buffers off, 30 units
Figure 5-53 Gain Error Distribution
ADS127L21B Gain Drift Distribution
Precharge buffers off, 30 units
Figure 5-55 Gain Drift Distribution
ADS127L21B Long-Term Gain Drift
30 units, gain calibrated at t = 0
Figure 5-57 Long-Term Gain Drift
ADS127L21B THD Distribution
VREF = 4.096V, 30 units
Figure 5-59 THD Distribution
ADS127L21B THD vs Input Amplitude
 
Figure 5-61 THD vs Input Amplitude
ADS127L21B INL Error vs Input Voltage
Max-speed mode 
Figure 5-63 INL Error vs Input Voltage
ADS127L21B INL Error vs Input Voltage
Mid-speed mode 
Figure 5-65 INL Error vs Input Voltage
ADS127L21B INL Distributions
Max-speed mode, 30 units
Figure 5-67 INL Distributions
ADS127L21B INL Distributions
High-speed mode, 30 units
Figure 5-69 INL Distributions
ADS127L21B INL Distributions
Mid-speed mode, 30 units
Figure 5-71 INL Distributions
ADS127L21B INL Distributions
Low-speed mode, 30 units
Figure 5-73 INL Distributions
ADS127L21B DC CMRR Distribution
30 units
Figure 5-75 DC CMRR Distribution
ADS127L21B CMRR vs Frequency
High-speed mode
Figure 5-77 CMRR vs Frequency
ADS127L21B Oscillator Frequency Distribution
30 units
Figure 5-79 Oscillator Frequency Distribution
ADS127L21B VCM Voltage Distribution
30 units
Figure 5-81 VCM Voltage Distribution
ADS127L21B REFP Input Current vs Reference Voltage
REFP precharge buffer off
Figure 5-83 REFP Input Current vs Reference Voltage
ADS127L21B DC PSRR Distribution
30 units
Figure 5-85 DC PSRR Distribution
ADS127L21B PSRR vs Power-Supply Frequency
 
Figure 5-87 PSRR vs Power-Supply Frequency
ADS127L21B Power-Supply Current vs Temperature
High-speed mode
Figure 5-89 Power-Supply Current vs Temperature
ADS127L21B Power-Supply Current vs Temperature
Low-speed mode
Figure 5-91 Power-Supply Current vs Temperature
ADS127L21B IOVDD Current vs Oversampling Ratio
Low-latency filter
Figure 5-93 IOVDD Current vs Oversampling Ratio
ADS127L21B Max-Speed Mode, Shorted-Input FFT
0Hz to 100Hz
Figure 5-8 Max-Speed Mode, Shorted-Input FFT
ADS127L21B Max-Speed Mode, Shorted-Input FFT
Sinc4 filter
Figure 5-10 Max-Speed Mode, Shorted-Input FFT
ADS127L21B Max-Speed Mode, Full-Scale FFT
VIN = –0.2dBFS, 1kHz, wideband filter
Figure 5-12 Max-Speed Mode, Full-Scale FFT
ADS127L21B High-Speed Mode, Shorted-Input FFT
0Hz to 100Hz
Figure 5-14 High-Speed Mode, Shorted-Input FFT
ADS127L21B High-Speed Mode, Shorted-Input FFT
Sinc4 filter
Figure 5-16 High-Speed Mode, Shorted-Input FFT
ADS127L21B High-Speed Mode, Full-Scale FFT
VIN = –0.2dBFS, 1kHz, wideband filter
Figure 5-18 High-Speed Mode, Full-Scale FFT
ADS127L21B Mid-Speed Mode, Shorted-Input FFT
0Hz to 50Hz
Figure 5-20 Mid-Speed Mode, Shorted-Input FFT
ADS127L21B Mid-Speed Mode, Shorted-Input FFT
Sinc4 filter
Figure 5-22 Mid-Speed Mode, Shorted-Input FFT
ADS127L21B Mid-Speed Mode, Full-Scale FFT
VIN = –0.2dBFS, 1kHz, wideband filter
Figure 5-24 Mid-Speed Mode, Full-Scale FFT
ADS127L21B Low-Speed Mode, Shorted-Input FFT
0Hz to 10Hz
Figure 5-26 Low-Speed Mode, Shorted-Input FFT
ADS127L21B Low-Speed Mode, Shorted-Input FFT
Sinc4 filter
Figure 5-28 Low-Speed Mode, Shorted-Input FFT
ADS127L21B Low-Speed Mode, Full-Scale FFT
VIN = –0.2dBFS, 1kHz, wideband filter
Figure 5-30 Low-Speed Mode, Full-Scale FFT
ADS127L21B High-Speed Mode Code Distributions
262,144 samples
Figure 5-32 High-Speed Mode Code Distributions
ADS127L21B Low-Speed Mode Code Distributions
262,144 samples
Figure 5-34 Low-Speed Mode Code Distributions
ADS127L21B Noise Performance Distributions
Sinc4 filter, OSR = 64, 30 units
Figure 5-36 Noise Performance Distributions
ADS127L21B Noise Performance vs Temperature
Wideband filter, OSR = 64
Figure 5-38 Noise Performance vs Temperature
ADS127L21B Dynamic Range Distributions
Wideband filter, OSR = 64, 30 units
Figure 5-40 Dynamic Range Distributions
ADS127L21B Input Current vs Differential Voltage
Precharge buffers on
Figure 5-42 Input Current vs Differential Voltage
ADS127L21B Input Current vs Differential Voltage
Precharge buffers off
Figure 5-44 Input Current vs Differential Voltage
ADS127L21B Input Current vs Temperature
Precharge buffers off, VIN = full scale, VREF = 2.5V
Figure 5-46 Input Current vs Temperature
ADS127L21B Input Current vs Temperature
Precharge buffers on, VIN = full scale, VREF = 2.5V
Figure 5-48 Input Current vs Temperature
ADS127L21B Offset Error vs Temperature
 
Figure 5-50 Offset Error vs Temperature
ADS127L21B Gain Error Distribution
Buffers on, 30 units
Figure 5-52 Gain Error Distribution
ADS127L21B Gain Drift Distribution
Precharge buffers on, 30 units
Figure 5-54 Gain Drift Distribution
ADS127L21B Gain Error vs Clock Frequency
Gain error calibrated at nominal clock frequency
Figure 5-56 Gain Error vs Clock Frequency
ADS127L21B THD Distribution
VREF = 2.5V, 30 units
Figure 5-58 THD Distribution
ADS127L21B THD Overtemperature Distributions
 
Figure 5-60 THD Overtemperature Distributions
ADS127L21B Intermodulation Distortion FFT
f1 = 9.7kHz, f2 = 10.3kHz, VIN = −6.5dBFS
Figure 5-62 Intermodulation Distortion FFT
ADS127L21B INL Error vs Input Voltage
High-speed mode 
Figure 5-64 INL Error vs Input Voltage
ADS127L21B INL Error vs Input Voltage
Low-speed mode 
Figure 5-66 INL Error vs Input Voltage
ADS127L21B INL Distributions
Max-speed mode, 30 units
Figure 5-68 INL Distributions
ADS127L21B INL Distributions
High-speed mode, 30 units
Figure 5-70 INL Distributions
ADS127L21B INL Distributions
Mid-speed mode, 30 units
Figure 5-72 INL Distributions
ADS127L21B INL Distributions
Low-speed mode, 30 units
Figure 5-74 INL Distributions
ADS127L21B DC CMRR vs Temperature
30 units
Figure 5-76 DC CMRR vs Temperature
ADS127L21B CMRR vs Frequency
Low-speed mode
Figure 5-78 CMRR vs Frequency
ADS127L21B Oscillator Frequency vs Temperature
30 units
Figure 5-80 Oscillator Frequency vs Temperature
ADS127L21B VCM Voltage vs Temperature
30 units
Figure 5-82 VCM Voltage vs Temperature
ADS127L21B REFP Input Current vs Reference Voltage
REFP precharge buffer on
Figure 5-84 REFP Input Current vs Reference Voltage
ADS127L21B DC PSRR vs Temperature
 
Figure 5-86 DC PSRR vs Temperature
ADS127L21B Power-Supply Current vs Temperature
Max-speed mode
Figure 5-88 Power-Supply Current vs Temperature
ADS127L21B Power-Supply Current vs Temperature
Mid-speed mode
Figure 5-90 Power-Supply Current vs Temperature
ADS127L21B IOVDD Current vs Oversampling Ratio
Wideband filter
Figure 5-92 IOVDD Current vs Oversampling Ratio
ADS127L21B Power-Down Mode Supply Current vs Temperature
 
Figure 5-94 Power-Down Mode Supply Current vs Temperature