SBAU448 September   2024 ADS8681W

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Performance Development Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  8. 2Hardware
    1. 2.1 EVM Analog Interface
      1. 2.1.1 ADC Analog Input Signal Path
      2. 2.1.2 Onboard ADC Reference
    2. 2.2 Power Supplies
  9. 3Software
    1. 3.1 Digital Interfaces
      1. 3.1.1 multiSPITM SPI for ADC Digital IO
    2. 3.2 ADS8681WEVM-PDK Initial Setup
      1. 3.2.1 Default Jumper and Switch Settings
      2. 3.2.2 EVM Graphical User Interface (GUI) Software Installation
  10. 4Implementation Results
    1. 4.1 ADS8681WEVM-PDK Operation
      1. 4.1.1 EVM GUI Global Settings for ADC control
      2. 4.1.2 Register Map Configuration Tool
      3. 4.1.3 Time Domain Display Tool
      4. 4.1.4 Histogram Tool
      5. 4.1.5 Spectral Analysis Tool
      6. 4.1.6 Linearity Analysis Tool
  11. 5Hardware Design Files
    1. 5.1 ADS8681WEVM-PDK Schematic
    2. 5.2 PCB Layout
    3. 5.3 Bill of Materials
  12. 6Additional Information
    1. 6.1 Trademarks
  13. 7Related Documentation

ADC Analog Input Signal Path

The ADS8681WEVM is designed for easy interfacing to analog sources via SMA connector. J1 and J7 of the ADS8681WEVM are SMA connectors that allow single-ended and differential analog source connectivity to the input signal path of the ADS8681W through a coaxial cable. The schematic for the analog input signal path is shown in Figure 2-1.

ADS8681WEVM-PDK Schematic of Input Signal PathFigure 2-1 Schematic of Input Signal Path

When evaluating the ADS8681W performance on the EVM board, the proper resistor values can be used together with a 330pF capacitor (C0G type) to compose a low-pass filter on the input path.

The internal over-voltage protection circuit of the ADS8681W withstands up to ±20 V on the analog input pin. However, external protection circuitry is utilized to provide additional over-voltage protection with transient voltage suppressors (TVS) D1 and D4, and high-power resistors (MMA0204 footprint) R3 and R33 on the input signal path to the ADS8681W.

AIN_P and AIN_M are also accessible through pin 8 of header J5 and pin 8 of header J8 respectively. The odd-numbered pins of J5 and J8 are shorted together on the board and can be jumpered to any one of the even numbered pins which are marked as “GND”, “VTH”, or “VTL”.

ADS8681WEVM-PDK Connectors and Jumpers for InputFigure 2-2 Connectors and Jumpers for Input

The EVM board provides buffered DC voltage sources that have nominal values of about 4V and 100mV. Header pins J5.Pin4 and J8.Pin4 provide a 4V output (VTH). Header pins J5.Pin6 and J8.Pin6 provide a 100mV output (VTL). These DC voltage pins are useful for debugging any potential problems with the front-end circuit or the ADC. The jumper settings for using VTL and VTH on-board voltage signal and external input signal on J1 and J7 are summarized in Table 2-1 and Table 2-2, respectively.

Table 2-1 Jumper Settings on J5 for AIN_P
Input Value J5.Pin1 < > J5.Pin2 J5.Pin3 < > J5.Pin4 J5.Pin5 < > J5.Pin6 J5.Pin7 < > J5.Pin8
VTL 100mV Open Open Close Close
VTH 4V Open Close Open Close
GND Ground Close Open Open Close
External Signal on J1 Open Open Open Open
Table 2-2 Jumper Settings on J8 for AIN_N

Input

Value

J8.Pin1 < > J8.Pin2J8.Pin3 < > J8.Pin4J8.Pin5 < > J8.Pin6J8.Pin7 < > J8.Pin8

VTL

100mV

Open

OpenCloseClose

VTH

4V

OpenCloseOpen

Close

GND

Ground

CloseOpenOpenClose

External Signal on J7

OpenOpenOpenOpen
Note:

In single-ended operation, connect AIN_M to ground by installing jumpers across J8[1,2] and J8[7,8] (see Table 2-2).