Figure 7-3 shows the current flow when the inverter switches from conduction zone (Q1, Q6) to (Q3, Q6). In zone (Q1, Q6), motor windings U and W are energized. Phase currents are indicated by the black dashed arrows. Next the inverter proceeds to zone (Q3, Q6) where windings V and W are energized. Phase currents are indicated by the red dashed arrows. At the transition between zones (Q1, Q6) and (Q3, Q6), Q1 turns off and Q3 turns on while Q6 is kept on. The current in winding U does not stop abruptly, instead it continues to flow through the freewheeling diode D2 and gradually decreases in magnitude.

Figure 7-4 shows what occurs when the decay current flows through the low side diode. Inductance L represents parasitic inductance on PCB. There is no current flowing in L until the start of zone (Q3, Q6). At the moment when Q1 is turned off, current in L increases from zero to the initial value of the decay current instantaneously.

The fast change in current induces an opposing voltage across L. To the CSA, this voltage appears as a negative common-mode voltage spike. This is illustrated in Figure 7-5 to the bottom. Such negative surge spike occurs at least once every electrical cycle and is repetitive in nature. If the spike’s magnitude exceeds the input range of the CSA, it may weaken the physical structure of the CSA. This effect may need to be considered when selecting the CSA. Best practices in PCB layout should also be followed to minimized parasitic inductance.

In high-side current sensing, a similar effect is caused by parasitic inductances between the DC link and shunt resistor. It happens when motor winding switches from being driven with negative current to undriven, and the top side diode (D1 for example) conducts. However the surge is positive and adds to the DC link voltage, increasing the common-mode voltage burden of the CSA. This effect is shown in Figure 7-5 to the top. Similar to low-side, the surge is repetitive and occurs at least once every electrical cycle.

In inline current sensing, where the sense resistor is placed between the switching node and motor winding, the CSA experiences the full-scale ground to Vbus voltage as input common-mode while the inverter leg is being PWM modulated. The worst case occurs at the moment of commutation when either the top or bottom diode conducts. The diode drop is superimposed on ground or Vbus potential, as well as any spikes due to parasitic inductance. This situation is illustrated in Figure 7-5 to the middle. For better clarity, this plot is made assuming 100% PWM duty cycle.